{"id":64470,"date":"2024-05-16T14:52:47","date_gmt":"2024-05-16T21:52:47","guid":{"rendered":"https:\/\/www.rambus.com\/?page_id=64470"},"modified":"2026-01-27T19:37:03","modified_gmt":"2026-01-28T03:37:03","slug":"silicon-ip","status":"publish","type":"page","link":"https:\/\/www.rambus.com\/silicon-ip\/","title":{"rendered":"Silicon IP"},"content":{"rendered":"\t\t
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Silicon IP<\/h1>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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High-performance interface and certified security solutions engineered for your success<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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Home<\/a><\/span><\/span><\/p>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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With a rich history of innovation spanning over three decades in delivering state-of-the-art Silicon IP solutions, our commitment to support our customers from concept to launch sets us apart. Our trusted expertise, unwavering support, and reliable products empower our customers to accelerate their time to market while minimizing risk and maximizing success.<\/p>

Our portfolio of Silicon IP solutions includes a broad array of high-performance interface and certified security solutions to meet the stringent demands of emerging applications.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t

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Product Families<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Interface IP<\/a><\/strong><\/h3>

Our state-of-the-art interconnect and memory interface IP consists of digital controller IP for PCIe\u00ae, CXL\u00ae, HBM, GDDR and DDR standards. We also offer digital controller IP for the LPDDR and MIPI\u00ae standards, as well as a suite of Video Compression and Forward Error Correction IP.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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\n\t\t\t\t\t\n\t\t\t\t\t\t\n\t\t\t\t\t\t\t\t\tSee All Security IP Solutions<\/span>\n\t\t\t\t\t<\/span>\n\t\t\t\t\t<\/a>\n\t\t\t\t<\/div>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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Explore Our IP Catalog<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Product Type<\/th>Category<\/th>Protocol<\/th>Function<\/th>Part Number<\/th>Short Description<\/th>Keywords<\/th>ASIC<\/th>FPGA<\/th>Datasheet<\/th><\/tr>\n<\/thead>\n
IP<\/td>Security<\/td>3DES<\/td>Cipher Accelerator<\/td>3DES-IP-16<\/td>Rambus 3DES ECD\/CBC Accelerator<\/td>3DES, ECB, CBC<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Cipher Accelerator<\/td>AES-AE-16-DPA(-FIA)<\/td>Rambus AES Authenticated Encryption Accelerator, 16 Sbox, DPA or DPA and FIA<\/td>AES, 16 Sbox, DPA,FIA<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Cipher Accelerator<\/td>AES-AE-32-DPA(-FIA)<\/td>Rambus AES Authenticated Encryption Accelerator, 32 Sbox, DPA or DPA and FIA. CC EAL4+ certified<\/td>AES, 32 Sbox, DPA, FIA CC EAL4+ certified<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Cipher Accelerator<\/td>AES-IP-36<\/td>Rambus AES ECB\/CBC\/CTR Accelerator<\/td>AES Accelerator , high-speed, high-performance, encrypt, decrypt, core, accelerator, security, crypto, cipher<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Cipher Accelerator<\/td>AES-IP-37<\/td>Rambus AES Key Wrap Engine<\/td>AES, key-wrap high-speed, high-performance, encrypt, decrypt, core, accelerator, security, crypto, cipher<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Cipher Accelerator<\/td>AES-IP-38<\/td>Rambus AES GCM\/XTS Engine<\/td>AES, GCM, LRW, XTS, high-speed, high-performance, encrypt, decrypt, core, accelerator, security, crypto, cipher<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Cipher Accelerator<\/td>AES-IP-39<\/td>Rambus AES “All Modes” Accelerator<\/td>AES, CCM, high-speed, high-performance, encrypt, decrypt, core, accelerator, security, crypto, cipher<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Cipher Accelerator<\/td>AES-IP-61<\/td>Rambus AES-GCM Pipeline<\/td>AES-GCM-GMAC Accelerator, AES-GCM, AES-CTR mode, GHASH<\/td>1<\/td><\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>ARC4<\/td>Cipher Accelerator<\/td>ARC4-IP-44<\/td>Rambus ARC4 Stream Cipher Accelerator<\/td>IP, security, ARC4, crypto, cipher, encryption, decryption, RC4<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>ASCON<\/td>Crypto Algorithm Accelerator<\/td>ASCON-IP-41<\/td>Rambus ASCON Lightweight Crypto Algorithm Accelerator<\/td>ASCON<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td><\/td>Cipher Accelerator<\/td>QSE-IP-86<\/td>Quantum Safe Engine for ML-KEM (CRYSTALS-Kyber) and ML-DSA (CRYSTALS-Dilithium)<\/td>Quantum Safe Cryptography, Post-Quantum Cryptography, PQC, ML-KEM, ML-DSA, CRYSTALS-Kyber, CRYSTALS-Dilithium<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td><\/td>Cipher Accelerator<\/td>QSE-IP-86 DPA<\/td>Quantum Safe Engine for ML-KEM (CRYSTALS-Kyber) and ML-DSA (CRYSTALS-Dilithium) with DPA<\/td>Quantum Safe Cryptography, Post-Quantum Cryptography, PQC, ML-KEM, ML-DSA, CRYSTALS-Kyber, CRYSTALS-Dilithium<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe<\/td>Add-on Core<\/td>AXI DMA Back-End Core<\/td>Rambus AXI DMA Back-End Core<\/td>AXI DMA Back-End Core<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe<\/td>Add-on Core<\/td>AXI Interface Core<\/td>Rambus AXI Interface Core<\/td>AXI, AMBA<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>CC-312 Root of Trust<\/td>Rambus CC-312 CryptoCell Root of Trust for Arm Cortex-M TrustZone-based IoT Edge Devices and Sensors<\/td>Security Engine, CryptoCell, Arm, Cortex-M, TrustZone<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>CC-712 Root of Trust<\/td>Rambus CC-712 CryptoCell Root of Trust for Arm Cortex-A TrustZone-based IoT Servers and Gateways<\/td>Security Engine, CryptoCell, Arm, Cortex-A, TrustZone<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>CC-713 Root of Trust<\/td>Rambus CC-713 CryptoCell Root of Trust for Arm Cortex-A TrustZone-based IoT Servers and Gateways for the China Market<\/td>Security Engine, CryptoCell, Arm, Cortex-A, TrustZone<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>CCIX 1.1<\/td>Controller<\/td>CCIX 1.1 Controller<\/td>Rambus CCIX 1.1 Controller<\/td>PCIe, PCI Express, PCIe 5.0, PCI Express Gen4, PCIe Gen 4, PCIe 4.0, PCI Express Gen6<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>CCIX 1.1<\/td>Controller<\/td>CCIX 1.1 Controller with AXI<\/td>Rambus CCIX 1.1 Controller with AMBA AXI interface<\/td>PCIe, CCIX, AMBA, AXI<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>ChaCha20<\/td>Cipher Accelerator<\/td>ChaCha-13<\/td>Rambus ChaCha20 Engine<\/td>ChaCha, ChaCha20, encrypt, decrypt, core, accelerator, security, crypto, cipher<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>CI-300P-C Root of Trust<\/td>Rambus CI-300P-C CryptoIsland Root of Trust for Secure Element Devices such as iSim, 5G Modems, Mobile App Processors<\/td>Security Engine, CryptoIsland, Arm, Secure Element<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES, SHA-2<\/td>Cipher Accelerator<\/td>CRYPT-IP-120<\/td>Rambus Low-power HMAC SHA AES Crypto Engine<\/td>HMAC SHA AES Accelerator, AES, SHA, HMAC, GCM, DMA, AHB<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Anti-Counterfeiting<\/td>CryptoFirewall Consumable Core<\/td>Rambus CryptoFirewall Consumable Core<\/td>Anti-counterfeiting security core, Consumable core<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Anti-Counterfeiting<\/td>CryptoFirewall Verfier Core<\/td>Rambus CryptoFirewall Verfier Core<\/td>Anti-counterfeiting security core, Verifier core<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>CXL 2.0\/1.1<\/td>Controller<\/td>CXL 2.0 Controller<\/td>Rambus Compute Express Link (CXL) 2.0 Controller<\/td>CXL, Compute Express Link<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>CXL 3.1<\/td>Controller<\/td>CXL 3.1 Controller<\/td>Rambus Compute Express Link (CXL) 3.1 Controller<\/td>CXL, Compute Express Link<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>CXL 3.1<\/td>Controller<\/td>CXL 3.1 Controller with AXI<\/td>Rambus Compute Express Link (CXL) 3.1 Controller with AXI<\/td>CXL, Compute Express Link<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>CXL 2.0\/1.1<\/td>Controller<\/td>CXL 2.0 Controller with AXI<\/td>Rambus Compute Express Link (CXL) 2.0 Controller with AMBA AXI interface<\/td>CXL, Compute Express Link, AXI<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>DDR3<\/td>Controller<\/td>DDR3 Memory Controller<\/td>Rambus DDR3 Memory Controller<\/td>DDR3 Controller, DDR3<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>DDR4<\/td>Controller<\/td>DDR4 Memory Controller<\/td>Rambus DDR4 Memory Controller<\/td>DDR4 Controller, DDR4<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
Provisioning<\/td>Security<\/td>Security<\/td>Secure Provisioning<\/td>Device Key Management<\/td>Rambus Device Key Management Platform<\/td>Provisioning, device identification, root key storage, Root of Trust<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Forward Error Correction<\/td>DisplayPort 1.4<\/td>FEC Receiver<\/td>DisplayPort 1.4 FEC Reciever<\/td>Rambus DisplayPort 1.4 FEC Receiver<\/td>DisplayPort, FEC, Receiver, Forward Error Correction<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Forward Error Correction<\/td>DisplayPort 1.4<\/td>FEC Transmitter<\/td>DisplayPort 1.4 FEC Transmitter<\/td>Rambus DisplayPort 1.4 FEC Transmitter<\/td>DisplayPort, FEC, Transmitter, Forward Error Correction<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Forward Error Correction<\/td>DisplayPort 1.4<\/td>FEC Transmitter<\/td>DisplayPort 1.4 FEC Transmitter<\/td>Rambus DisplayPort 1.4 FEC Transmitter for Automotive, ASIL-B<\/td>DisplayPort, FEC, Transmitter, Forward Error Correction<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>DDR<\/td>Add-on Core<\/td>DMA Back-End Core<\/td>Rambus DMA Back-End Core<\/td>DMA Back-End Core<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>DDR<\/td>Add-on Core<\/td>DMA Back-End Driver<\/td>Rambus DMA Back-End Driver<\/td>DMA Driver, dma, driver<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>DDR<\/td>Add-on Core<\/td>DMA Bridge Core<\/td>Rambus High-performance PCIe-AXI Bridge and\/or scatter-gather DMA<\/td>PCIe-AXI Bridge , DMA<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>DDR<\/td>Add-on Core<\/td>DMA Driver<\/td>Rambus Windows & Linux Drivers for the DMA Core<\/td>DMA Driver, dma, driver<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Cipher Accelerator<\/td>DPA & FI Resistant AES-32 Crypto Core<\/td>Rambus DPA and Fault Injection Resistant AES-32 Cryptographic Core<\/td>Rambus DPA and Fault Injection Resistant AES-32 Cryptographic Core<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Cipher Accelerator<\/td>DPA & FI Resistant AES-AE Crypto Core<\/td>Rambus DPA & Fault Injection Resistant AES-AE Cryptographic Core<\/td>Rambus DPA & Fault Injection Resistant AES-AE Cryptographic Core<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Cipher Accelerator<\/td>DPA & FI Resistant AES-ECB Crypto Core<\/td>Rambus DPA & Fault Injection Resistant AES-ECB Cryptographic Core<\/td>Rambus DPA & Fault Injection Resistant AES-ECB Cryptographic Core<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>PKE<\/td>Public Key Accelerator<\/td>DPA & FI Resistant PKE Crypto Accelerator Core<\/td>Rambus DPA & Fault Injection Resistant PKE Cryptographic Accelerator Core<\/td>Rambus DPA and Fault Injection Resistant PKE 64×64 Cryptographic Accelerator Core<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>3DES<\/td>Cipher Accelerator<\/td>DPA Resistant 3DES (ECB) Crypto Accelerator Core<\/td>Rambus 3DES-ECB 1 Billion trace DPA resistant cryptographic accelerator core<\/td>Rambus Cryptographic Accelerator Core 3DES-ECB<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Cipher Accelerator<\/td>DPA Resistant AES Core<\/td>Rambus DPA Resistant AES Core<\/td>AES, DPA Resistant, cryptography<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Cipher Accelerator<\/td>DPA Resistant AES-AE Crypto Accelerator Core<\/td>Rambus AES (ECB-CBC-CFB-CTR-GCM), 1 Billion Trace DPA Resistant Cryptographic Accelerator Cores<\/td>Rambus Cryptographic Accelerator Core AES-AE<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Cipher Accelerator<\/td>DPA Resistant AES-ECB Crypto Accelerator Core<\/td>Rambus AES (ECB), 1 Billion Trace DPA Resistant Cryptographic Accelerator Cores<\/td>Rambus Cryptographic Accelerator Core AES-ECB<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Cipher Accelerator<\/td>DPA Resistant AES-FBC Crypto Accelerator Core<\/td>Rambus AES (ECB-CBC-CFB-CTR), 1 Billion Trace DPA Resistant Cryptographic Accelerator Cores<\/td>Rambus Cryptographic Accelerator Core AES-FBC<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>3DES<\/td>Cipher Accelerator<\/td>DPA Resistant Crypto Accelerator Core 3DES-ECB<\/td>Rambus DPA Resistant Cryptographic Accelerator Core 3DES-ECB<\/td>Rambus DPA Resistant Cryptographic Accelerator Core 3DES-ECB<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>ChaCha20<\/td>Cipher Accelerator<\/td>DPA Resistant Crypto Accelerator Core ChaCha20<\/td>Rambus DPA Resistant Cryptographic Accelerator Core ChaCha20<\/td>Rambus DPA Resistant Cryptographic Accelerator Core ChaCha20<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>ChaCha20<\/td>Cipher Accelerator<\/td>DPA Resistant Crypto Accelerator Core ChaCha20<\/td>Rambus DPA Resistant Cryptographic Accelerator Core ChaCha20<\/td>Rambus DPA Resistant Cryptographic Accelerator Core ChaCha20<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>RNG<\/td>Random Number Generator<\/td>DPA Resistant Crypto Accelerator Core RBG<\/td>Rambus DPA Resistant Cryptographic Accelerator Core RBG (NRBG+DRBG)<\/td>Rambus DPA Resistant Cryptographic Accelerator Core RBG (NRBG+DRBG)<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>HMAC SHA-2<\/td>HMAC Accelerator<\/td>DPA Resistant HMAC-SHA-2 Crypto Accelerator Core<\/td>Rambus HMAC-SHA-2 (224\/256\/384\/512) 100 Million Trace DPA Resistant Cryptographic Accelerator Cores<\/td>Rambus Cryptographic Accelerator Core HMAC-SHA-2<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>PKE<\/td>Cipher Accelerator<\/td>DPA Resistant PKE Crypto Accelerator Core<\/td>Rambus DPA Resistant Cryptographic Accelerator Core<\/td>Rambus DPA Resistant Cryptographic Accelerator Core PKE<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>DDR<\/td>Add-on Core<\/td>ECC Core<\/td>Rambus ECC Core<\/td>error correction code<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
Software Library<\/td>Security<\/td>IPsec, MACsec<\/td>Software Library<\/td>FIPS Cryptographic Libraries<\/td>Rambus FIPS 140-2 and FIPS 140-3 validated cryptographic libraries<\/td>FIPS 140-2, FIPS 140-3, cryptographic libraries<\/td><\/td><\/td><\/td> <\/tr>\n
Software Toolkit<\/td>Security<\/td>TLS<\/td>Software Toolkit<\/td>FIPS TLS Toolkit<\/td>Rambus FIPS compliant TLS toolkit<\/td><\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>GDDR6<\/td>Controller<\/td>GDDR6 Memory Controller<\/td>Rambus GDDR6 Controller<\/td>GDDR6 Controller, GDDR 6 Controller<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>GDDR7<\/td>Controller<\/td>GDDR7 Memory Controller<\/td>Rambus GDDR7 Controller<\/td>GDDR7 Controller, GDDR 7 Controller, GDDR7 Memory Controller<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
Debug and Test<\/td>Interconnect<\/td>PCIe 5.0 \/ 32G<\/td>PCIe Test and Development<\/td>Gen5Endpoint<\/td>Rambus Gen5Endpoint reference plaform for prototyping and development of PCIe 5.0 hosts\/root port devices<\/td>PCI Express, PCIe 5.0<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
Debug and Test<\/td>Interconnect<\/td>PCIe 5.0 \/ 32G<\/td>PCIe Test and Development<\/td>Gen5Host<\/td>Rambus Gen5Host reference plaform for prototyping and development of PCIe 5.0 endpoint devices<\/td>PCI Express, PCIe 5.0<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>HMAC SHA-3, SHA-2<\/td>Hash\/HMAC Accelerator<\/td>HASH-IP-57<\/td>Rambus SHA-3, SHA-2, SHA-1, SM3, MD5, Hash Accelerator<\/td>MD5\/SHA-1\/SHA-2 Accelerator, SHA, SHA-1, MD5, SHA-2, SHA-256, SHA-224, SHA-384, SHA-512, hashing, silicon, SoC, hash, sha, authentication, security<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>HBM2\/2E<\/td>Controller<\/td>HBM2\/2E Controller Core V2<\/td>Rambus HBM2\/2E Memory Controller Core<\/td>HBM Controller, HBM, Controller, Memory Controller, DRAM Controller, HBM2E Controller, HBM Gen 2 Controller, HBM Gen 2E Controller<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>HBM3E<\/td>Controller<\/td>HBM3E\/3 Memory Controller<\/td>Rambus HBM3 Memory Controller<\/td>HBM Controller, HBM, Controller, Memory Controller, DRAM Controller, HBM3 Controller, HBM3E Controller, HBM 3 Controller, HBM Gen 3 Controller<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>HBM4<\/td>Controller<\/td>HBM4 Memory Controller<\/td>Rambus HBM4 Memory Controller<\/td>HBM Controller, HBM, Controller, Memory Controller, DRAM Controller, HBM4 Controller, HBM4 Controller, HBM 4 Controller, HBM Gen 4 Controller<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Forward Error Correction<\/td>HDMI 2.1<\/td>FEC Receiver<\/td>HDMI 2.1 FEC Receiver<\/td>Rambus HDMI 2.1 FEC Receiver <\/td>HDMI, FEC, Receiver, Forward Error Correction<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Forward Error Correction<\/td>HDMI 2.1<\/td>FEC Transmitter<\/td>HDMI 2.1 FEC Transmitter<\/td>Rambus HDMI 2.1 FEC Transmitter<\/td>HDMI, FEC, Transmitter, Forward Error Correction<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>SHA-3, SHAKE<\/td>HMAC Accelerator<\/td>HMAC-IP-59<\/td>Rambus SHA-3, SHAKE, cSHAKE, SHA-2, SHA-1, SM3, MD5 Hash-based HMAC and KMAC Accelerator<\/td>SHA-3, SHAKE, cSHAKE, SHA-2, SHA-1, SM3, MD5 Hash-based HMAC, KMAC<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>HMAC SHA-2<\/td>HMAC Accelerator<\/td>HMAC-SHA-256-512-DPA<\/td>Rambus HMAC SHA-2 engine, 224, 256, 384 & 512 Mode, DPA<\/td>HMAC, SHA, SHA-1, MD5, SHA-2, SHA-256, SHA-224, SHA-384, SHA-512, hashing, silicon, SoC, hash, sha, authentication, security<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>HMAC SHA-2<\/td>HMAC Accelerator<\/td>HMAC-SHA-256-DPA<\/td>Rambus HMAC SHA-2 engine, 224 & 256 Mode, DPA<\/td>HMAC, SHA, SHA-1, MD5, SHA-2, SHA-256, SHA-224, SHA-384, SHA-512, hashing, silicon, SoC, hash, sha, authentication, security<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Inline Cipher Engine<\/td>ICE-338-AES-DPA<\/td>Rambus AES Inline Cipher Engine, DPA<\/td>Inline Cipher Engine, AES, DPA<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Inline Cipher Engine<\/td>ICE-338-AES-DPA<\/td>Rambus AES Inline Cipher Engine, DPA<\/td>AES, Inline Cipher, DPA<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>SM4<\/td>Inline Cipher Engine<\/td>ICE-338-SM4-DPA<\/td>Rambus SM4 Inline Cipher Engine, DPA<\/td>Inline Cipher Engine, SM4, DPA<\/td><\/td><\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>SM4<\/td>Inline Cipher Engine<\/td>ICE-338-SM4-DPA<\/td>Rambus SM4 Inline Cipher Engine, DPA<\/td>SM4, Inline Cipher, DPA<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Inline Cipher Engine<\/td>ICE-IP-338<\/td>Rambus Inline Cipher Engine for Memory Encryption. AES-XTS\/GCM, SM4-XTS\/GCM<\/td>Inline Ciper Engine, AES-XTS, AES-GCM, SM4-XTS, SM4-GCM, XTS, GCM, DPA<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES, SM4<\/td>Inline Cipher Engine<\/td>ICE-IP-339<\/td>Rambus Inline Cipher Engine with AXI, for Memory Encryption. AES-XTS\/GCM, SM4-XTS\/GCM<\/td>Inline Ciper Engine, AES-XTS, AES-GCM, SM4-XTS, SM4-GCM, XTS, GCM, DPA, AXI<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>PCIe, CXL, NVMe<\/td>Inline Cipher Engine<\/td>ICE-IP-63<\/td>Rambus Inline Cipher Engine for PCIe, CXL, NVMe, 5G FlexE link integrity and IDE with AES-GCM<\/td>Inline Cipher Engine for PCIe, CXL, NVMe, 5G FlexE link, IDE, AES-GCM<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
Chips<\/td>Memory Interface<\/td>DDR4<\/td>Data Buffer<\/td>iDDR4DB2-GS02<\/td>Rambus DDR4 Data Buffer 3200 MT\/s data rate<\/td>DDR4, RDIMM, LRDIMM, DB<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
Chips<\/td>Memory Interface<\/td>DDR4<\/td>Registering Clock Driver<\/td>iDDR4NVRCD2-GS03<\/td>Rambus DDR4 Registering Clock Driver 3200 MT\/s data rate for non-volatile memory<\/td>DDR4, NVDIMM, RCD<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
Chips<\/td>Memory Interface<\/td>DDR4<\/td>Registering Clock Driver<\/td>iDDR4RCD-GS02<\/td>Rambus DDR4 Registering Clock Driver 3200 MT\/s data rate<\/td>DDR4, RDIMM, LRDIMM, RCD<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES<\/td>Inline Memory Encryption Engine<\/td>IME-IP-340<\/td>Rambus Inline Memory Encryption Engine for FPGA, AES-GCM<\/td>Inline Memory Encryption, IME, FPGA, AES-GCM, DPA<\/td><\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>AES, SM4<\/td>Inline Memory Encryption Engine<\/td>IME-IP-341<\/td>Rambus Inline Memory Encryption Engine for ASIC, AES-XTS\/GCM amd SM4-XTS\/GCM<\/td>Inline Memory Encryption, IME, AES-XTS, AES-GCM, SM4-XTS, SM4-GCM, XTS, GCM, DPA<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
Debug and Test<\/td>Interconnect<\/td>PCIe 5.0 \/ 32G<\/td>PCIe Test and Development<\/td>INSPECTOR for PCIe 5.0<\/td>Rambus INSPECTOR for PCIe 5.0 interposer card for diagnostic testing and debug of PCIe 5.0 devices<\/td>PCI Express, PCIe 5.0, Test, Debug<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
Software Toolkit<\/td>Security<\/td>IPsec<\/td>Software Toolkit<\/td>IPsec Toolkit<\/td>Rambus IPsec software toolkit<\/td>ipsec, toolkit<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Kasumi<\/td>Cipher Accelerator<\/td>Kasumi-IP-06<\/td>Rambus 3GPP Kasumi Accelerator<\/td>Kasumi, 3GPP, f8, f9, encryption, decryption, crypto, security, cryptographic, cipher<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>LPDDR4X\/4<\/td>Controller<\/td>LPDDR4X\/4 Memory Controller Core<\/td>Rambus LPDDR4X\/4 Controller Core<\/td>LPDDR4 Controller, LPDDR4, LPDDR4X Controller, LPDDR4X, SDRAM, memory Controller<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>LPDDR5T\/5X\/5<\/td>Controller<\/td>LPDDR5T\/5X\/5 Memory Controller Core<\/td>Rambus LPDDR5T\/5X\/5 Controller Core<\/td>LPDDR5 Controller, LPDDR5, LPDDR5X Controller, LPDDR5X, LPDDR5T Controller, LPDDR5T, SDRAM, memory Controller<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>LPDDR5T\/5X\/5, LPDDR4X\/4<\/td>Controller<\/td>LPDDR4X\/4 & LPDDR5T\/5X\/5 Combo Controller Core<\/td>Rambus LPDDR4X\/4 & LPDDR5T\/5X\/5 Combo Controller Core<\/td>LPDDR4 Controller, LPDDR4, LPDDR4X Controller, LPDDR4X, LPDDR5 Controller, LPDDR5, LPDDR5X Controller, LPDDR5X, LPDDR5T Controller, LPDDR5T, SDRAM, memory Controller<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>MACsec<\/td>Protocol Engine<\/td>MACsec-IP-160<\/td>Rambus 1G to 100G Single-Port MACsec Engine with FIFO Interface<\/td>MACsec, security, accelerators, FIFO, 100Gbps, Ethernet<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>MACsec<\/td>Protocol Engine<\/td>MACsec-IP-362<\/td>Rambus Automotive-grade 10M to 25G Single-Port MACsec Engine with xMII, GMII and XGMII support <\/td>MACsec, security, accelerators, MII, RMII, GMII, XGMII, 25Gbps, TSN, IEEE802.3br, ISO 26262, Automotive<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>MACsec<\/td>Protocol Engine<\/td>MACsec-IP-162<\/td>Rambus Automotive-grade 10M to 25G Single-Port MACsec Engine<\/td>MACsec, Inline, security, crypto, protocol, high-speed, high-performance, Frame, accelerator, crypto, automotive<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>MACsec<\/td>Protocol Engine<\/td>MACsec-IP-161<\/td>Rambus 1G to 50G Single-Port MACsec Engine with TSN Support<\/td>MACsec, Inline, security, crypto, protocol, high-speed, high-performance, Frame, accelerator, crypto<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>MACsec<\/td>Protocol Engine<\/td>MACsec-IP-364<\/td>Rambus 1.6T\/3.2T Multi-Channel MACsec Engine<\/td>MACsec, security, accelerator, 1.6Tbps, 3.2Tbps, 800Gpbs, optional IPsec security<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>MACsec<\/td>Protocol Engine<\/td>MACsec-IP-363<\/td>Rambus 1.6T\/3.2T Multi-Channel MACsec Classifier<\/td>MACsec, security, classifier, 1.6Tbps, 3.2Tbps, 800Gpbs, optional IPsec security<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>MACsec<\/td>Protocol Engine<\/td>MACsec-IP-164<\/td>Rambus 800G Multi-Channel MACsec Engine<\/td>MACsec, security, accelerator, 100Gbps to 800Gbps, optional ClearTags and other classification features, Cisco extensions<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>MACsec<\/td>Protocol Engine<\/td>MACsec-IP-361<\/td>Rambus 1G to 50G Single-Port MACsec Engine with xMII Support<\/td>MACsec, security, accelerators, MII, GMII, xMII, 50Gbps, TSN, IEEE802.3br<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>DDR<\/td>Controller<\/td>Mem Test Analyzer Core<\/td>Rambus Mem Test Analyzer Core<\/td>Mem Test Analyzer Core<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>MIPI CSI-2 Tx and Rx<\/td>Controller<\/td>MIPI CSI-2 Tx and Rx Controller Core V2<\/td>Rambus MIPI CSI-2 Tx and Rx Controller Core V2<\/td>MIPI CSI-2 Controller , MIPI, CSI-2, CSI2, Controller , mipi<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>MIPI DSI-2 Tx and Rx<\/td>Controller<\/td>MIPI DSI-2 Tx and Rx Controller Core<\/td>Rambus MIPI DSI-2 Tx and Rx Controller Core<\/td>MIPI DSI Controller, DSI-2, DSI2, DSI Controller, MIPI<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
Debug and Test<\/td>Interconnect<\/td>MIPI<\/td>Controller<\/td>MIPI Testbench<\/td>Rambus MIPI Testbench<\/td>MIPI, Testbench<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>MIPI Testbench<\/td>Testbench<\/td>MIPI Testbench<\/td>Rambus MIPI Testbench<\/td>MIPI, CSI-2, DSI-2, Testbench<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>DDR<\/td>Controller<\/td>Multi-Port Front-End<\/td>Rambus Multi-Port Front-End<\/td>Multi-Port Front-End<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 1.1<\/td>Controller<\/td>PCIe 1.1 Controller<\/td>Rambus PCIe 1.1 Controller with PHY Interface for PCI Express (PIPE) specification and native user interface support<\/td>PCIe, PCI Express, PCIe 1.0, PCI Express Gen4, PCIe Gen 1, AMBA-AXI<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 1.1<\/td>Controller<\/td>PCIe 1.1 Controller with AXI<\/td>Rambus PCIe 1.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with Built-in DMA and Configurable AMBA AXI Interconnect<\/td>PCI Express Controller, PCIe, AXI, PCI Express, DMA, controller, gen4, PCIe 1.0, AMBA, AXI<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 2.1<\/td>Controller<\/td>PCIe 2.1 Controller<\/td>Rambus PCIe 2.1 Controller with the PHY Interface for PCI Express (PIPE) specification and native user interface support<\/td>PCIe, PCI Express, PCIe 2.0, PCI Express Gen4, PCIe Gen 2, AMBa-AXI<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 2.1<\/td>Controller<\/td>PCIe 2.1 Controller with AXI<\/td>Rambus PCIe 2.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with Built-in DMA and Configurable AMBA AXI Interconnect<\/td>PCI Express Controller, PCIe, AXI, PCI Express, DMA, controller, gen4, PCIe 2.0, AMBA, AXI<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 3.1<\/td>Controller<\/td>PCIe 3.1 Controller<\/td>Rambus PCIe 3.1, 2.1, 1.1 Controller with the PHY Interface for PCI Express (PIPE) specification and native user interface support<\/td>PCI Express Controller, PCIe, PCI Express, 3.0, 2.0, 1.1, IP, endpoint, root, switch, gen3<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 3.1<\/td>Controller<\/td>PCIe 3.1 Controller with AXI<\/td>Rambus PCIe 3.1, 2.1, 1.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with AMBA AXI User Interface<\/td>PCI Express Controller, PCIe, AXI, PCI Express, DMA, controller, gen3<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 4.0 \/ 16G<\/td>Controller<\/td>PCIe 4.0 Controller<\/td>Rambus PCIe 4.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features<\/td>PCIe, PCI Express, PCIe 4.0, PCI Express Gen4, PCIe Gen 4,<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 4.0 \/ 16G<\/td>Controller<\/td>PCIe 4.0 Controller with AXI<\/td>Rambus PCIe 4.0 Controller with AMBA AXI interface<\/td>PCI Express Controller, PCIe, AXI, PCI Express, DMA, controller, gen4, PCIe 4.0, AMBA, AXI<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 5.0 \/ 32G<\/td>Controller<\/td>PCIe 5.0 Controller<\/td>Rambus PCIe 5.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features<\/td>PCIe, PCI Express, PCIe 5.0, PCI Express Gen5, PCIe Gen 5,<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 5.0 \/ 32G<\/td>Controller<\/td>PCIe 5.0 Controller with AXI<\/td>Rambus PCIe 5.0 Controller with AMBA AXI interface<\/td>DMA Engine, DMA, PCIe, PCI Express, FPGA, Altera, Xilinx, DMA AXI<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 5.0 \/ 32G<\/td>Controller<\/td>PCIe 5.0 Multi-port Switch<\/td>Rambus PCIe 5.0 Customizable Embedded Multi-port Switch<\/td>PCIe, Switch, Switch IP, Switch Core, Multi-port PCIe Switch, PCI Express<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 6.1 \/ 64G and PCIe <\/td>Controller<\/td>PCIe 6.1 Controller<\/td>Rambus PCIe 6.1 Controller <\/td>PCIe 6.1, PCI express 6.1<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 7.0<\/td>Controller<\/td>PCIe 7.0 Controller<\/td>Rambus PCIe 7.0 Controller<\/td>PCIe 7.0, PCI Express 7.0<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 7.0<\/td>Controller<\/td>PCIe 7.0 Controller with AXI<\/td>Rambus PCIe 7.0 Controller with AXI<\/td>PCIe 7.0, PCI Express 7.0<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 7.0<\/td>Controller<\/td>PCIe 7.0 Retimer Controller<\/td>Rambus PCIe 7.0 Retimer Controller<\/td>PCIe 7.0, PCI Express 7.0, Retimer<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 7.0<\/td>Controller<\/td>PCIe 7.0 Switch<\/td>Rambus PCIe 7.0 Switch<\/td>PCIe 7.0, PCI Express 7.0, Switch<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 6.2<\/td>Controller<\/td>PCIe 6.2 Switch<\/td>Rambus PCIe 6.2 Switch<\/td>PCIe 6.2, PCI Express 6.2, Switch<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 6.1 \/ 64G and PCIe <\/td>Controller<\/td>PCIe 6.1 Controller<\/td>Rambus PCIe 6.1 Controller with AXI interface<\/td>PCIe 6.1, PCI express 6.1<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 6.0 \/ 64G<\/td>Retimer Controller<\/td>PCIe 6.0 Retimer Controller<\/td>Rambus PCIe 6.0 Retimer Controller<\/td>PCIe 6.0, PCI express 6.0, Retimer<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 5.0 \/ USB4<\/td>Controller<\/td>PCIe Controller for USB4<\/td>Rambus PCIe Controller for USB4 Hosts and Devices, supporting PCIe Tunneling<\/td>PCIe, USB4, Device, Host<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 5.0 \/ USB4<\/td>Controller<\/td>PCIe Controller for USB4 with AXI<\/td>Rambus PCIe Controller for USB4 Hosts and Devices supporting PCIe Tunneling, with optional built-in DMA and configurable AMBA AXI interface<\/td>PCIe, USB4, Device, Host, AMBA, AXI<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe Controller Testbench<\/td>Controller<\/td>PCIe Controller Testbench<\/td>Rambus PCIe Controller Testbench<\/td>PCIe Testbench, PCI Express Testbench<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe 5.0 \/ USB4<\/td>Controller<\/td>PCIe Multi-port Switch for USB4<\/td>Rambus PCIe Switch for USB4 Hubs, Hosts and Devices<\/td>PCIe, Switch, Switch IP, Switch Core, Multi-port PCIe Switch, PCI Express, USB4<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>PKE<\/td>Public Key Accelerator<\/td>PKA-IP-150<\/td>Rambus RSA\/ECC Public Key Accelerators with TRNG and AHB<\/td>public key accelerator, PKI, RSA, ECC, TRNG, AHB<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>PKE<\/td>Public Key Accelerator<\/td>PKA-IP-28<\/td>Rambus Public Key accelerator Engine<\/td>public key accelerator, PKI, security<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>PKE<\/td>Public Key Accelerator<\/td>PKE-IP-85-DPA(-FIA)<\/td>Rambus Public Engine with DPA or with DPA and FIA<\/td>public key accelerator, PKI, security, TRNG, random, number<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>PKE<\/td>Ultra-Fast Public Key Engine<\/td>PKE-IP-85f<\/td>Rambus Ultra-Fast Public Key Engine<\/td>public key accelerator, PKI<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>PKE<\/td>Farm of Ultra-Fast Public Key Engines<\/td>PKE-IP-85f-x<\/td>Rambus Farm of x * Ultra-Fast Public Key Engines<\/td>public key accelerator, PKI, Farm<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>PKE<\/td>Public Key Accelerator Farm<\/td>PKI-IP-154<\/td>Rambus Public Key Accelerator Farm Engine with TRNG and AHB<\/td>Public Key Infrastructure, Public Key Accelerator, RSA, PKI, security, TRNG, random, number, AES, AHB, Farm<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>Poly1305<\/td>Hash\/HMAC Accelerator<\/td>POLY-IP-53<\/td>Rambus Poly1305-based MAC Accelerator<\/td>Poly, poly1305, hashing, silicon, SoC, authentication, security<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>IPsec\/TLS\/DTLS\/SSL<\/td>Protocol Engine<\/td>Protocol-IP-196<\/td>Rambus 10G Multi-Protocol Engine with Classifier, Look-Aside<\/td>Security Protocol Engine, Flow-Through Packet Engine, inline, packet processing, security, IP, crypto, encryption, packet classification, Ipsec, SSL, TLS, DTLS, 3GPP, MACsec<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>IPsec\/TLS\/DTLS\/SSL<\/td>Protocol Engine<\/td>Protocol-IP-197<\/td>Rambus 100G Multi-Protocol Engine with Classification, Look-Aside and Inline<\/td>Security Protocol Engine, Flow-Through Packet Engine, inline, packet processing, security, IP, crypto, encryption, packet classification, IPsec, SSL, TLS, DTLS, CAPWAP, 3GPP, MACsec, AMBA<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>IPsec ESP<\/td>Protocol Engine<\/td>Protocol-IP-67<\/td>Rambus 800G 64-Channel IPsec ESP Transform Engine, AES-GCM, AES-GMAC<\/td>IPSec ESP, AES-GCM, AES-GMAC, 800G, time-sliced packet interface<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>IPsec ESP<\/td>Protocol Engine<\/td>Protocol-IP-68<\/td>Rambus 100G 64-channel IPsec ESP Transform Engine, AES-GCM, AES-GMAC, 50G ChaCha20\/Poly1305<\/td>IPSec ESP, AES-GCM, AES-GMAC, 100G, ChaCha20, Poly1305, time-sliced packet interface<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>IPsec\/TLS\/DTLS\/SSL<\/td>Protocol Engine<\/td>Protocol-IP-93<\/td>Rambus Low Power 1G Multi-Protocol Engine<\/td>IPSec, TLS, SRTP, SSL, AHB, PLB, Packet, DMA, SA, security, crypto, protocol, low gate count, accelerator, security, crypto<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
Provisioning<\/td>Security<\/td>Security<\/td>Secure Provisioning<\/td>Provisioning Platform<\/td>Rambus Provisioning Platform<\/td>Provisioning, device identification, root key storage, Root of Trust<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
Chips<\/td>Memory Interface<\/td>DDR5<\/td>Registering Clock Driver<\/td>RCD1-G1EX<\/td>Rambus DDR5 Registering Clock Driver 4800 MT\/s date rate<\/td>DDR5, RDIMM, RCD<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
Chips<\/td>Memory Interface<\/td>DDR5<\/td>Registering Clock Driver<\/td>RCD2-G1B<\/td>Rambus DDR5 Registering Clock Driver 5600 MT\/s date rate<\/td>DDR5, RDIMM, RCD<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
Chips<\/td>Memory Interface<\/td>DDR5<\/td>Registering Clock Driver<\/td>RCD4-GA0<\/td>Rambus DDR5 Registering Clock Driver 7200 MT\/s date rate<\/td>DDR5, RDIMM, RCD<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
Chips<\/td>Memory Interface<\/td>DDR5<\/td>Registering Clock Driver<\/td>RCD3-G1A<\/td>Rambus DDR4 Registering Clock Driver 6400 MT\/s data rate<\/td>DDR5, RDIMM, RCD<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>DDR<\/td>Add-on Core<\/td>Read-Modify-Write Core<\/td>Rambus Read-Modify-Write Core<\/td>Read-Modify-Write Core<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Memory Interface<\/td>DDR<\/td>Add-on Core<\/td>Reorder Core<\/td>Rambus Reorder Core<\/td>Reorder Core, Memory Interface<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>RT-120 Root of Trust<\/td>Rambus RT-120 Firmware-Controlled Root of Trust for IoT and IIoT, sensors and gateways<\/td>Security Engine, VaultIP, Root of Trust, Rambus Hardware Root of Trust RT-100, Root of Trust RT-120<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>RT-121 Root of Trust<\/td>Rambus RT-121 Firmware-Controlled Root of Trust for IoT and IIoT, sensors and gateways for China market<\/td>Security Engine, VaultIP, Root of Trust, Rambus Hardware Root of Trust RT-121, Root of Trust RT-121<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>RT-130 Root of Trust<\/td>Rambus RT-130 Firmware-Controlled Root of Trust for IoT, IoT servers, gateways, edge devices<\/td>Security Engine, VaultIP, Root of Trust, Rambus Hardware Root of Trust RT-130, Root of Trust RT-130<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>RT-131 Root of Trust<\/td>Rambus RT-131 Firmware-Controlled Root of Trust for IoT, IoT servers, gateways, edge devices for China market<\/td>Security Engine, VaultIP, Root of Trust, Rambus Hardware Root of Trust RT-131, Root of Trust RT-131<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>RT-140 Root of Trust<\/td>Rambus RT-140 State-Machine-based Root of Trust for IoT, IIoT and cloud-connected devices, sensors, gateways<\/td>Security Engine, VaultIP, Root of Trust, Rambus Hardware Root of Trust RT-140, Root of Trust RT-140<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>RT-1660 Root of Trust<\/td>Rambus RT-1660 Highly Secure Hardware Programmable Root of Trust Security Processor with DPA and FIA Resistance<\/td>Security Engine, CryptoManager, Root of Trust, Rambus Hardware Root of Trust RT-1660, Root of Trust RT-1660, Rambus Hardware Root of Trust RT-1660, Root of Trust RT-1660, DPA, FIA<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>RT-260 Root of Trust<\/td>Rambus RT-260 State-Machine-based Root of Trust for IoT, IIoT and cloud-connected devices, sensors, gateways<\/td>Security Engine, VaultIP, Root of Trust, Rambus Hardware Root of Trust RT-260, Root of Trust RT-260<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>RT-630-FPGA Root of Trust<\/td>Rambus RT-630-FPGA Programmable Hardware Root of Trust Security Processor for Cloud\/AI\/ML SoC FIPS-140<\/td>Security Engine, CryptoManager, Root of Trust, Rambus Hardware Root of Trust RT-630, Root of Trust RT-630, Rambus Hardware Root of Trust RT-630 FPGA, Root of Trust RT-630 FPGA<\/td><\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>RT-640 HSM\/Root of Trust<\/td>Rambus RT-640 Programmable Embedded Hardware Security Module (HSM) for Automotive ASIL-B<\/td>Security Engine, CryptoManager, Root of Trust, Rambus Hardware Root of Trust RT-640, Root of Trust RT-640, ASIL-B<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>RT-641 HSM\/Root of Trust<\/td>Rambus RT-641 Programmable Embedded Hardware Security Module (HSM) for China Market<\/td>Security Engine, CryptoManager, Root of Trust, Rambus Hardware Root of Trust RT-641, Root of Trust RT-641<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Security<\/td>Root of Trust<\/td>RT-7xx CryptoManager Root of Trust Family<\/td>Rambus Automotive-grade RT-7xx CryptoManager HSM, fully programmable ISO 26262 and ISO 21434 compliant hardware security core<\/td>Security Engine, CryptoManager, Root of Trust, HSM, Rambus Hardware Root of Trust RT-7xx, Quantum Safe, DPA, FIA, OSCAA, SM2, SM3, SM4, ISO 26262, ASIL-B, ASIL-D, ISO 21434, RT-730B, RT-731B, RT-734B, RT-760D, RT-761D, RT-764D, Automotive<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Security<\/td>Root of Trust<\/td>RT-6xx CryptoManager Root of Trust Family<\/td>Rambus RT-6xx CryptoManager Root of Trust, fully programmable FIPS 140-3 compliant hardware security core<\/td>Security Engine, CryptoManager, Root of Trust, Rambus Hardware Root of Trust RT-6xx, Root of Trust RT-630, FIPS-140, Caliptra, Quantum Safe, DPA, FIA, OSCAA, SM2, SM3, SM4, RT-631, RT-634, RT-635, RT-639, RT-660, RT-661, RT-664, RT-669, RT-1660, RT-1664<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Security<\/td>Root of Trust<\/td>CH-7xx CryptoManager Hub Family<\/td>Rambus Automotive-grade CH-7xx NIST CAVP hardware classic cryptographic accelerators (AES, SHA-2, SHA-3, RSA, ECC) with a NIST certified TRNG<\/td>Security Engine, CryptoManager, Root of Trust, Rambus Hardware Root of Trust, CryptoManager Hub, Quantum Safe, DPA, FIA, OSCCA, SM2, SM3, SM4, CH-730B, CH-731B, CH-734B, CH-760D, CH-761D, CH-764D, Automotive<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Security<\/td>Root of Trust<\/td>CC-7xx CryptoManager Hub Family<\/td>Rambus CC-7xx NIST CAVP standalone symmetric cipher-only subsystem <\/td>Security Engine, CryptoManager, Root of Trust, Rambus Hardware Root of Trust, CryptoManager Core, Symmetric Crypto Engine, DPA, FIA, OSCAA, SM2, SM3, SM4, CC-630, CC-631, CC-660, CC-661, Automotive<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Security<\/td>Root of Trust<\/td>CH-6xx CryptoManager Hub Family<\/td>Rambus CH-6xx NIST CAVP hardware classic cryptographic accelerators (AES, SHA-2, SHA-3, RSA, ECC) with a NIST certified TRNG<\/td>Security Engine, CryptoManager, Root of Trust, Rambus Hardware Root of Trust, CryptoManager Hub, Quantum Safe, DPA, FIA, OSCCA, SM2, SM3, SM4, CH-630, CH-631, CH-634, CH-660, CH-661, CH-664<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Security<\/td>Root of Trust<\/td>CC-6xx CryptoManager Core Family<\/td>Rambus CC-6xx NIST CAVP standalone symmetric cipher-only subsystem <\/td>Security Engine, CryptoManager, Root of Trust, Rambus Hardware Root of Trust, CryptoManager Core, Symmetric Crypto Engine, DPA, FIA, OSCAA, SM2, SM3, SM4, CC-630, CC-631, CC-660, CC-661<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>Many<\/td>Root of Trust<\/td>RT-660-FPGA Root of Trust<\/td>Rambus RT-660-FPGA DPA-Resistant Hardware Programmable Root of Trust Security Processor with DPA and FIA Resistance<\/td>Security Engine, CryptoManager, Root of Trust, Rambus Hardware Root of Trust RT-660, Root of Trust RT-660, Rambus Hardware Root of Trust RT-660 FPGA, Root of Trust RT-660 FPGA<\/td> <\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
Software Toolkit<\/td>Security<\/td>Many<\/td>Software Toolkit<\/td>Secure Boot<\/td>Rambus secure boot solution<\/td>secure boot, crypto, security<\/td><\/td><\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>SM3<\/td>Hash\/HMAC Accelerator<\/td>SM3-IP-52<\/td>Rambus SM3 Engine<\/td>Sm3, hashing, silicon, SoC, authentication, security<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>SM4<\/td>Cipher Accelerator<\/td>SM4-IP-12<\/td>Rambus SM4 ECB\/CBC\/CTR Accelerator<\/td>SM4, encrypt, decrypt, core, accelerator, security, crypto, cipher<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>SM4<\/td>Cipher Accelerator<\/td>SM4-IP-40<\/td>Rambus SM4 “All Modes” Accelerator<\/td>SM4, XTS, DDR, Encryption, SM, OSCCA<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Security<\/td>SNOW<\/td>Cipher Accelerator<\/td>SNOW-IP-46<\/td>Rambus 3GPP SNOW Accelerator<\/td>SNOW3G, SNOW, 3GPP, high-speed, high-performance, encrypt, decrypt, core, accelerator, security, crypto, cipher<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
Chips<\/td>Memory Interface<\/td>DDR5<\/td>SPD Hub with Internal Temperature Sensor<\/td>SPD5118-G1B<\/td>Rambus DDR5 SPD Hub with Internal Temperature Sensor<\/td>DDR5, RDIMM, RCD, SPD Hub, UDIMM, SODIMM<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>TRNG<\/td>True Random Number Generator<\/td>TRNG-IP-76<\/td>Rambus FIPS-certified TRNG, SP800-90A\/B\/C Certified, with DRBG<\/td>RNG, TRNG, random number generator, true, silicon, IP, safenet, security, macsec, ipsec, crypto, random, FIPS, SP800-90A\/B\/C, DRBG<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>TRNG<\/td>True Random Number Generator<\/td>TRNG-IP-77<\/td>Rambus Fast TRNG, SP800-90A\/B\/C, with DRBG<\/td>RNG, TRNG, random number generator, true, silicon, IP, safenet, security, macsec, ipsec, crypto, random, FIPS, SP800-90A\/B\/C, DRBG<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
Chips<\/td>Memory Interface<\/td>DDR5<\/td>Temperature Sensor<\/td>TS5110-G1B<\/td>Rambus DDR5 Temperature Sensor<\/td>DDR5, RDIMM, RCD<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
Chips<\/td>Memory Interface<\/td>DDR5<\/td>Power Management IC for Servers<\/td>P1945XXGA1<\/td>PMIC5000 High Current Power Management IC for Servers<\/td>DDR5, RDIMM, PMIC, Power Management IC<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
Chips<\/td>Memory Interface<\/td>DDR5<\/td>Power Management IC for Servers<\/td>P1943XXGA0<\/td>PMIC5010 Low Current Power Management IC for Servers<\/td>DDR5, RDIMM, PMIC, Power Management IC<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
Chips<\/td>Memory Interface<\/td>DDR5<\/td>Power Management IC for Servers<\/td>P1947XXGA1<\/td>PMIC5020 Extreme Current Power Management IC for Servers<\/td>DDR5, RDIMM, MCR DIMM, PMIC, Power Management IC<\/td><\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe<\/td>Controller<\/td>vDMA<\/td>Rambus Many-Channel Centralized DMA Controller with AMBA AXI Interface<\/td>DMA Engine, DMA, PCIe, PCI Express, FPGA, Altera, Xilinx, DMA AXI<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Video Compression<\/td>VESA DSC<\/td>Decoder<\/td>VESA DSC Decoder for AMD FPGAs<\/td>Rambus VESA DSC Decoder for AMD FPGAs<\/td>VESA, DSC, Decoder, AMD, Xilinx, FPGA, video compression<\/td><\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Video Compression<\/td>VESA DSC<\/td>Decoder<\/td>VESA DSC Decoder for ASIC<\/td>Rambus VESA DSC Decoder for ASICs<\/td>VESA, DSC, Decoder, video compression<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Video Compression<\/td>VESA DSC<\/td>Decoder<\/td>VESA DSC Decoder for Intel FPGAs<\/td>Rambus VESA DSC Decoder for Intel FPGAs<\/td>VESA, DSC, Decoder, Intel, Altera, FPGA, video compression<\/td><\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Video Compression<\/td>VESA DSC<\/td>Encoder<\/td>VESA DSC Encoder for AMD FPGAs<\/td>Rambus VESA DSC Encoder for AMD FPGAs<\/td>VESA, DSC, Encoder, AMD, Xilinx, FPGA, video compression<\/td><\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Video Compression<\/td>VESA DSC<\/td>Encoder<\/td>VESA DSC Encoder for ASIC<\/td>Rambus VESA DSC Encoder for ASICs<\/td>VESA, DSC, Encoder, video compression<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Video Compression<\/td>VESA DSC<\/td>Encoder<\/td>VESA DSC Encoder for ASIC (ASIL-B)<\/td>Rambus VESA DSC Encoder for ASIC for Automotive, ASIL-B<\/td>VESA, DSC, Encoder, ASIL-B, video compression<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Video Compression<\/td>VESA DSC<\/td>Encoder<\/td>VESA DSC Encoder for Intel FPGAs<\/td>Rambus VESA DSC Encoder for Intel FPGAs<\/td>VESA, DSC, Encoder, Intel, Altera, FPGA, video compression<\/td><\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Video Compression<\/td>VESA VDC-M<\/td>Decoder<\/td>VESA VDC-M Decoder for ASIC<\/td>Rambus VESA VDC-M Decoder for ASICs<\/td>VESA, VDC-M, Decoder, video compression<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Video Compression<\/td>VESA VDC-M<\/td>Encoder<\/td>VESA VDC-M Encoder for AMD FPGAs<\/td>Rambus VESA VDC-M Encoder for AMD FPGAs<\/td>VESA, VDC-M, Encoder, AMD, Xilinx, FPGA, video compression<\/td><\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Video Compression<\/td>VESA VDC-M<\/td>Encoder<\/td>VESA VDC-M Encoder for ASIC<\/td>Rambus VESA VDC-M Encoder for ASICs<\/td>VESA, VDC-M, Encoder, video compression<\/td>1<\/td><\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Video Compression<\/td>VESA VDC-M<\/td>Encoder<\/td>VESA VDC-M Encoder for Intel FPGAs<\/td>Rambus VESA VDC-M Encoder for Intel FPGAs<\/td>VESA, VDC-M, Encoder, Intel, Altera, FPGA, video compression<\/td><\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>WHIRLPOOL<\/td>Cipher Accelerator<\/td>WHIRLPOOL-IP-51<\/td>Rambus Whirlpool Cryptographic Accelerator Core<\/td>Rambus DPA Resistant Core Whirlpool<\/td>1<\/td>1<\/td><\/td> <\/tr>\n
IP<\/td>Interconnect<\/td>PCIe \/ CXL<\/td>Add-on Core<\/td>XpressAGENT<\/td>Rambus XpressAGENT Add-on Module <\/td>PCIe, CXL, PCI Express, Compute Express Link, Debug<\/td>1<\/td>1<\/td>\"document<\/a><\/td> <\/tr>\n
IP<\/td>Security<\/td>ZUC<\/td>Cipher Accelerator<\/td>ZUC-IP-48<\/td>Rambus 3GPP ZUC Engine<\/td>3GPP, 128-EEA3, 128-EIA3, ETSI\/SAGE, hashing, silicon, SoC, authentication, security<\/td>1<\/td>1<\/td><\/td> <\/tr>\n <\/tbody>\n <\/table>\n \n \n \n<\/div>\n<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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From the blog<\/h3>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tDEEPX, Rambus, and Samsung Foundry Collaborate to Enable Efficient Edge Inferencing Applications\t\t\t<\/a>\n\t\t<\/h3>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tBOS Semiconductors and Rambus: Securing the Future of Automotive AI\t\t\t<\/a>\n\t\t<\/h3>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tMeeting the Demands of Next-Gen Client Computing with a High-Performance, High-Reliability SPD Hub\t\t\t<\/a>\n\t\t<\/h3>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/article>\n\t\t\t\t<\/div>\n\t\t\n\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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Markets<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tRambus Enhances Data Center and AI Protection with Next-Gen CryptoManager Security IP Solutions\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tRambus Announces Industry-First HBM4 Controller IP to Accelerate Next-Generation AI Workloads\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tRambus Protects Data Center Infrastructure with Quantum Safe Engine IP\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t<\/div>\n\t\t\n\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tHBM4 Memory: Break Through to Greater Bandwidth\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tMACsec Fundamentals\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tMIPI DSI-2 & VESA Video Compression Drive Performance for Next-Generation Displays\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t<\/div>\n\t\t\n\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tSecure by Design Series: UEC Security: Delivering High-Performance, Scalability and Secure Networking for AI and HPC\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tSecure by Design Series: Security Certifications: Navigating Standards, Requirements, and Market Expectations\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tSecure by Design Series: Preparing for the Quantum Era: Practical Approaches to Quantum Safe Cryptography\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t<\/div>\n\t\t\n\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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\n\t\t\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t<\/div>\n\t\t","protected":false},"excerpt":{"rendered":"

Silicon IP High-performance interface and certified security solutions engineered for your success Contact Us With a rich history of innovation spanning over three decades in<\/p>\n","protected":false},"author":6,"featured_media":60117,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"template-full.php","meta":{"_genesis_hide_title":false,"_genesis_hide_breadcrumbs":false,"_genesis_hide_singular_image":false,"_genesis_hide_footer_widgets":false,"_genesis_custom_body_class":"","_genesis_custom_post_class":"","_genesis_layout":"","footnotes":"","_links_to":"","_links_to_target":""},"tags":[],"class_list":{"0":"post-64470","1":"page","2":"type-page","3":"status-publish","4":"has-post-thumbnail","6":"entry"},"yoast_head":"\nSilicon IP | Interface and Security Solutions - Rambus<\/title>\n<meta name=\"description\" content=\"Our portfolio of Silicon IP solutions includes a broad array of high-performance Interface and Certified Security solutions to meet the stringent demands of emerging applications.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.rambus.com\/silicon-ip\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Silicon IP\" \/>\n<meta property=\"og:description\" content=\"Silicon IP High-performance interface and certified security solutions engineered for your success Contact Us With a rich history of innovation spanning\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.rambus.com\/silicon-ip\/\" \/>\n<meta property=\"og:site_name\" content=\"Rambus\" \/>\n<meta property=\"article:publisher\" content=\"https:\/\/www.facebook.com\/RambusInc\" \/>\n<meta property=\"article:modified_time\" content=\"2026-01-28T03:37:03+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/www.rambus.com\/wp-content\/uploads\/2021\/03\/chip-blue-black-background.jpg\" \/>\n\t<meta property=\"og:image:width\" content=\"500\" \/>\n\t<meta property=\"og:image:height\" content=\"286\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/jpeg\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:site\" content=\"@rambusinc\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\/\/schema.org\",\"@graph\":[{\"@type\":\"WebPage\",\"@id\":\"https:\/\/www.rambus.com\/silicon-ip\/\",\"url\":\"https:\/\/www.rambus.com\/silicon-ip\/\",\"name\":\"Silicon IP | Interface and Security Solutions - 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