{"id":60612,"date":"2021-08-16T14:00:33","date_gmt":"2021-08-16T21:00:33","guid":{"rendered":"https:\/\/www.rambus.com\/?p=60612"},"modified":"2021-08-16T14:00:33","modified_gmt":"2021-08-16T21:00:33","slug":"rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem","status":"publish","type":"post","link":"https:\/\/www.rambus.com\/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem\/","title":{"rendered":"Rambus Advances AI\/ML Performance with 8.4 Gbps HBM3-Ready Memory Subsystem"},"content":{"rendered":"<p><strong>Highlights:\u00a0<\/strong><\/p>\n<ul>\n<li><em>Provides HBM3-ready memory subsystem solution consisting of fully-integrated PHY and digital controller <\/em><\/li>\n<li><em>Supports data rates up to 8.4 Gigabits per second (Gbps), enabling terabyte-scale bandwidth accelerators for artificial intelligence\/machine learning (AI\/ML) and high-performance computing (HPC) applications<\/em><\/li>\n<li><em>Leverages market-leading HBM2\/2E experience and installed-base to speed implementation of customer designs using next-generation HBM3 memory<\/em><\/li>\n<\/ul>\n<p><img fetchpriority=\"high\" decoding=\"async\" class=\"alignnone size-full wp-image-60613\" src=\"https:\/\/www.rambus.com\/wp-content\/uploads\/2021\/08\/HBM3-Ready-Memory-Subsystem_PR.png\" alt=\"HBM3 Ready Memory Subsytem\" width=\"1000\" height=\"500\" srcset=\"https:\/\/www.rambus.com\/wp-content\/uploads\/2021\/08\/HBM3-Ready-Memory-Subsystem_PR.png 1000w, https:\/\/www.rambus.com\/wp-content\/uploads\/2021\/08\/HBM3-Ready-Memory-Subsystem_PR-300x150.png 300w, https:\/\/www.rambus.com\/wp-content\/uploads\/2021\/08\/HBM3-Ready-Memory-Subsystem_PR-150x75.png 150w, https:\/\/www.rambus.com\/wp-content\/uploads\/2021\/08\/HBM3-Ready-Memory-Subsystem_PR-768x384.png 768w\" sizes=\"(max-width: 1000px) 100vw, 1000px\" \/><\/p>\n<p><strong>SAN JOSE, Calif. \u2013 Aug. 16, 2021 <\/strong>\u2013 <a href=\"https:\/\/www.rambus.com\/\">Rambus Inc.<\/a> (NASDAQ: <a href=\"https:\/\/finance.yahoo.com\/quote\/rmbs?ltr=1\">RMBS<\/a>), a premier chip and silicon IP provider making data faster and safer, today announced the Rambus HBM3-ready memory interface subsystem consisting of a fully-integrated <a href=\"https:\/\/www.rambus.com\/interface-ip\/ddrn-phys\/hbm3\/\">PHY<\/a> and <a href=\"https:\/\/www.rambus.com\/interface-ip\/controllers\/memory-controllers\/hbm3\/\">digital controller<\/a>. Supporting breakthrough data rates of up to 8.4 Gbps, the solution can deliver over a terabyte per second of bandwidth, more than double that of high-end HBM2E memory subsystems. With a market-leading position in HBM2\/2E memory interface deployments, Rambus is ideally suited to enable customers\u2019 implementations of accelerators using next-generation HBM3 memory.<\/p>\n<p>\u201cThe memory bandwidth requirements of AI\/ML training are insatiable with leading-edge training models now surpassing billions of parameters,\u201d said Soo Kyoum Kim, associate vice president, Memory Semiconductors at IDC. \u201cThe Rambus HBM3-ready memory subsystem raises the bar for performance enabling state-of-the-art AI\/ML and HPC applications.\u201d<\/p>\n<p>Rambus achieves HBM3 operation of up to 8.4 Gbps leveraging over 30 years of high-speed signaling expertise, and a strong history of 2.5D memory system architecture design and enablement. In addition to the fully-integrated HBM3-ready memory subsystem, Rambus provides its customers with interposer and package reference designs to speed their products to market.<\/p>\n<p>\u201cWith the performance achieved by our HBM3-ready memory subsystem, designers can deliver the bandwidth needed by the most demanding designs,\u201d said Matt Jones, general manager of Interface IP at Rambus. \u201cOur fully-integrated PHY and digital controller solution builds on our broad installed base of HBM2 customer deployments and is backed by a full suite of support services to ensure first-time right implementations for mission-critical AI\/ML designs.\u201d<\/p>\n<p><strong>Benefits of the Rambus HBM3-ready Memory Interface Subsystem:<\/strong><\/p>\n<ul>\n<li>Supports up to 8.4 Gbps data rate delivering bandwidth of 1.075 Terabytes per second (TB\/s)<\/li>\n<li>Reduces ASIC design complexity and speeds time to market with fully-integrated PHY and digital controller<\/li>\n<li>Delivers full bandwidth performance across all data traffic scenarios<\/li>\n<li>Supports HBM3 RAS features<\/li>\n<li>Includes built-in hardware-level performance activity monitor<\/li>\n<li>Provides access to Rambus system and SI\/PI experts helping ASIC designers to ensure maximum signal and power integrity for devices and systems<\/li>\n<li>Includes 2.5D package and interposer reference design as part of IP license<\/li>\n<li>Features LabStation\u2122 development environment that enables quick system bring-up, characterization and debug<\/li>\n<li>Enables the highest performance in applications including state-of-the-art AI\/ML training and high-performance computing (HPC) systems<\/li>\n<\/ul>\n<p>For more information on the Rambus Interface IP, including our PHYs and Controllers, please visit\u00a0<a href=\"https:\/\/www.rambus.com\/interface-ip\/\">rambus.com\/interface-ip<\/a>.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Highlights:\u00a0 Provides HBM3-ready memory subsystem solution consisting of fully-integrated PHY and digital controller Supports data rates up to 8.4 Gigabits per second (Gbps), enabling terabyte-scale bandwidth accelerators for artificial intelligence\/machine learning (AI\/ML) and high-performance computing (HPC) applications Leverages market-leading HBM2\/2E experience and installed-base to speed implementation of customer designs using next-generation HBM3 memory SAN JOSE, [&hellip;]<\/p>\n","protected":false},"author":6,"featured_media":60117,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_genesis_hide_title":false,"_genesis_hide_breadcrumbs":false,"_genesis_hide_singular_image":false,"_genesis_hide_footer_widgets":false,"_genesis_custom_body_class":"","_genesis_custom_post_class":"","_genesis_layout":"","footnotes":"","_links_to":"","_links_to_target":""},"categories":[26089,475,479,34],"tags":[],"class_list":{"0":"post-60612","1":"post","2":"type-post","3":"status-publish","4":"format-standard","5":"has-post-thumbnail","7":"category-press-releases-controllers","8":"category-memory-interface","9":"category-ddrn-phys","10":"category-pressreleases","11":"entry"},"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v26.9 (Yoast SEO v26.9) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>Rambus Advances AI\/ML Performance with 8.4 Gbps HBM3-Ready Memory Subsystem - Rambus<\/title>\n<meta name=\"description\" content=\"Rambus Inc. (NASDAQ: RMBS), a premier chip and silicon IP provider making data faster and safer, today announced the Rambus HBM3-ready memory interface subsystem consisting of a fully-integrated PHY and digital controller.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.rambus.com\/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Rambus Advances AI\/ML Performance with 8.4 Gbps HBM3-Ready Memory Subsystem\" \/>\n<meta property=\"og:description\" content=\"Highlights:\u00a0 Provides HBM3-ready memory subsystem solution consisting of fully-integrated PHY and digital controller Supports data rates up to 8.4\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.rambus.com\/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem\/\" \/>\n<meta property=\"og:site_name\" content=\"Rambus\" \/>\n<meta property=\"article:publisher\" content=\"https:\/\/www.facebook.com\/RambusInc\" \/>\n<meta property=\"article:published_time\" content=\"2021-08-16T21:00:33+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/www.rambus.com\/wp-content\/uploads\/2021\/03\/chip-blue-black-background.jpg\" \/>\n\t<meta property=\"og:image:width\" content=\"500\" \/>\n\t<meta property=\"og:image:height\" content=\"286\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/jpeg\" \/>\n<meta name=\"author\" content=\"fongj@rambus.com\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:creator\" content=\"@rambusinc\" \/>\n<meta name=\"twitter:site\" content=\"@rambusinc\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\/\/schema.org\",\"@graph\":[{\"@type\":\"Article\",\"@id\":\"https:\/\/www.rambus.com\/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem\/#article\",\"isPartOf\":{\"@id\":\"https:\/\/www.rambus.com\/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem\/\"},\"author\":{\"name\":\"fongj@rambus.com\",\"@id\":\"https:\/\/www.rambus.com\/#\/schema\/person\/37e2e7e0a04304c805d567b056b6282e\"},\"headline\":\"Rambus Advances AI\/ML Performance with 8.4 Gbps HBM3-Ready Memory Subsystem\",\"datePublished\":\"2021-08-16T21:00:33+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\/\/www.rambus.com\/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem\/\"},\"wordCount\":463,\"commentCount\":0,\"publisher\":{\"@id\":\"https:\/\/www.rambus.com\/#organization\"},\"image\":{\"@id\":\"https:\/\/www.rambus.com\/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem\/#primaryimage\"},\"thumbnailUrl\":\"https:\/\/www.rambus.com\/wp-content\/uploads\/2021\/03\/chip-blue-black-background.jpg\",\"articleSection\":[\"Controllers\",\"Interface IP\",\"Memory PHYs\",\"Press Releases\"],\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"CommentAction\",\"name\":\"Comment\",\"target\":[\"https:\/\/www.rambus.com\/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem\/#respond\"]}]},{\"@type\":\"WebPage\",\"@id\":\"https:\/\/www.rambus.com\/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem\/\",\"url\":\"https:\/\/www.rambus.com\/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem\/\",\"name\":\"Rambus Advances AI\/ML Performance with 8.4 Gbps HBM3-Ready Memory Subsystem - Rambus\",\"isPartOf\":{\"@id\":\"https:\/\/www.rambus.com\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\/\/www.rambus.com\/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem\/#primaryimage\"},\"image\":{\"@id\":\"https:\/\/www.rambus.com\/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem\/#primaryimage\"},\"thumbnailUrl\":\"https:\/\/www.rambus.com\/wp-content\/uploads\/2021\/03\/chip-blue-black-background.jpg\",\"datePublished\":\"2021-08-16T21:00:33+00:00\",\"description\":\"Rambus Inc. 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