{"id":20276,"date":"2017-09-20T05:00:38","date_gmt":"2017-09-20T13:00:38","guid":{"rendered":"https:\/\/www.rambus.com\/?page_id=20276"},"modified":"2026-01-27T19:16:06","modified_gmt":"2026-01-28T03:16:06","slug":"ddr5-dimm-chipset","status":"publish","type":"page","link":"https:\/\/www.rambus.com\/memory-interface-chips\/ddr5-dimm-chipset\/","title":{"rendered":"DDR5 DIMM Chipset"},"content":{"rendered":"\t\t
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DDR5 Server DIMM Chipset<\/h1>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Delivering industry-leading memory bandwidth and capacity<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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DDR5 Registering Clock Driver, Multiplexed Registering Clock Driver, Multiplexed Data Buffer, Power Management IC, SPD Hub and Temperature Sensor Chips<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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The Rambus DDR5 server memory interface chipset for RDIMMs, consisting of DDR5 Registering Clock Drivers (RCD), Power Management ICs (PMICs), Serial Presence Detect Hubs (SPD Hub) and Temperature Sensors (TS), is tailored for the high-capacity, high-bandwidth performance requirements of the latest generation DDR5 memory systems. Rambus also supports DDR5 server Multiplexed Rank DIMMs (MRDIMMs) with Multiplexed Registering Clock Drivers (MRCD), Multiplexed Data Buffers (MDBs), PMIC, SPD Hub and TS chips. In current and future RDIMMs and MRDIMMs, these chips enable server computing systems to handle the most demanding workloads and applications.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t

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Description<\/th>Part Number<\/th>Product Brief<\/th>Applications<\/th><\/tr><\/thead>
8000 MT\/s Registering Clock Driver<\/a><\/td>RCD5-Gxx<\/td>\"Download<\/a><\/td>Server RDIMM 8000<\/td><\/tr>
7200 MT\/s Registering Clock Driver<\/a><\/td>RCD4-Gxx<\/td>\"Download<\/a><\/td>Server RDIMM 7200<\/td><\/tr>
6400 MT\/s Registering Clock Driver<\/a><\/td>RCD3-Gxx<\/td>\"Download<\/a><\/td>Server RDIMM 6400<\/td><\/tr>
5600 MT\/s Registering Clock Driver<\/a><\/td>RCD2-Gxx<\/td>\"Download<\/a><\/td>Server RDIMM 5600<\/td><\/tr>
4800 MT\/s Registering Clock Driver<\/a><\/td>RCD1-G1EX<\/td>\"Download<\/a><\/td>Server RDIMM 4800<\/td><\/tr>
12800 MT\/s Multiplexed Registering Clock Driver<\/a><\/td>D5MRCD2Gxx<\/td>\"Download<\/a><\/td>Server MRDIMM 12800<\/td><\/tr>
12800 MT\/s Multiplexed Data Buffer<\/a><\/td>D5MDB2XGxx<\/td>\"Download<\/a><\/td>Server MRDIMM 12800<\/td><\/tr>
PMIC5000 High Current Power Management IC<\/a><\/td>P1945XXGxx<\/td>\"Download<\/a><\/td>Server RDIMM 4800 – 7200<\/td><\/tr>
PMIC5020 Extreme Current Power Management IC<\/a><\/td>P1947XXGxx<\/td>\"Download<\/a><\/td>Server RDIMM 4800 – 7200, MRDIMM 8800<\/td><\/tr>
PMIC5030 Gen2 Server Power Management IC<\/a><\/td>P2965XXGxx<\/td>\"Download <\/a><\/td>Server RDIMM 8000, MRDIMM 12800<\/td><\/tr>
SPD Hub with Internal Temperature Sensor<\/a><\/td>SPD1605Gxx<\/td>\"Download<\/a><\/td>Server RDIMM, MRDIMM Client UDIMM, SODIMM, CSODIMM, CUDIMM<\/td><\/tr>
Temperature Sensor<\/a><\/td>TS1685XGxx<\/td>\"Download <\/a><\/td>Server RDIMM, MRDIMM<\/td><\/tr><\/tbody><\/table>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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DDR5 RDIMMs Showing Rambus Memory Interface Chips<\/figcaption>\n\t\t\t\t\t\t\t\t\t\t<\/figure>\n\t\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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Ask the Experts: Rambus DDR5 DIMM Chipset Performance<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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The Rambus DDR5 Memory Interface Chipset enables increased memory capacity, while maintaining peak performance on dual inline memory modules (DIMMs). These gains are essential to handle the most data-intensive workloads.<\/p>\n

DDR5 Registering Clock Drivers (RCD), Power Management ICs (PMICs), Serial Presence Detect Hubs (SPD Hub) and Temperature Sensors (TS) are targeted for use in server DDR5 Registered DIMMs (RDIMMs) to deliver exceptional bandwidth, performance and capacity.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t

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\n\t\t\t\t\t\t\t\t\tAsk the Experts: DDR5 Memory Interface Chips with John Eble<\/strong>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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Data Center Evolution: DDR5 DIMMs Advance Server Performance<\/h3>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Driven by a confluence of megatrends, global data traffic is increasing at an exponential rate. For example, 5G networks are enabling billions of AI-powered IoT devices untethered from wired networks. Nowhere is the impact of all this growth being felt more intensely than in data centers. Indeed, hyperscale data centers have become the critical hubs of the global data network. DDR5 DRAM will enable the next generation of server systems providing the massive computing power of hyperscale and enterprise data centers. Learn about the benefits of DDR5 memory and the design considerations for implementing DDR5 DIMMs.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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The RCD is the key control plane chip which distributes Command\/Address signals and clock to the DRAM devices on the RDIMM.<\/p>

The PMIC provides power management that scales with the number of memory modules needed by the system configuration.<\/p>

The SPD Hub enables communication via the I3C bus of important data for system configuration and thermal management. It has an integrated temperature sensor.<\/p>

Two TS per DIMM offer precision thermal sensing and, in combination with the SPD Hub, provide three points of thermal telemetry for the memory module.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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Scaling DDR5 DIMMs<\/h3>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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DDR5 DIMMs increase memory bandwidth and capacity over DDR4 DIMMs with new innovations and a new module architecture. While DDR4 DIMMs top out at 3200 MT\/s, the first DDR5 DIMMs launched at 4800 MT\/s, a 50% increase in memory bandwidth.<\/p>

Given the voracious demands for greater memory bandwidth to support advanced workloads including HPC and AI\/ML, DDR5 will continue to scale. Rambus is constantly advancing the performance of its DDR5 solutions to meet growing market needs. Rambus has led the push to higher performance levels most recently with the announcement of the industry\u2019s first 8000 MT\/s DDR5 RCD<\/a>.<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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DDR5 FAQs<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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DDR5 memory delivers higher bandwidth and capacity compared to the previous DDR4 standard. DDR4 DIMMs top out at 3.2 GT\/s, initial DDR5 DIMMs delivered a 50% bandwidth increase to 4.8 GT\/s, and Rambus is already offering 5th<\/sup>\u00a0Gen 8.0 GT\/s DDR5 RCDs. In addition, DDR5 DIMMs support up to 4X the capacity of DDR4 DIMMs: 256GB vs. 64GB for DIMMs using single-die package DRAM devices.<\/p><\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t\t\t

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Rambus offers DDR5 Registering Clock Driver (RCD) chips operating at up to 8000 MT\/s. Additional companion chips include DDR5 Power Management ICs (PMICs), a DDR5 Temperature Sensor, as well as a DDR5 SPD Hub with Internal Temperature Sensor for both server and client DIMMs.<\/p><\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t\t\t

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Rambus offers DDR5 Registering Clock Driver (RCD) chips operating at up to 7200 MT\/s. Additional companion chips include DDR5 Power Management ICs (PMICs), a DDR5 Temperature Sensor, as well as a DDR5 SPD Hub with Internal Temperature Sensor for both server and client DIMMs.<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t\t\t
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Rambus has over thirty-five years of high-performance memory experience delivering industry leading data rates and bandwidth performance. As DDR5 scales to higher speeds, maintaining signal and power integrity becomes more difficult, and the Rambus DDR5 chipset builds on the company\u2019s memory and signaling expertise.<\/p><\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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From the blog<\/h3>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tMemory Bandwidth and DDR5 MRDIMMs Explained in this Ask the Experts\t\t\t<\/a>\n\t\t<\/h3>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tDDR5 vs DDR4 DRAM – All the Advantages & Design Challenges\t\t\t<\/a>\n\t\t<\/h3>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tJohn Eble Dives into Chipsets for Server and Client Systems in Ask the Experts\t\t\t<\/a>\n\t\t<\/h3>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/article>\n\t\t\t\t<\/div>\n\t\t\n\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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News<\/h4>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tRambus Delivers Industry-Leading Client Chipsets for Next-Generation AI PC Memory Modules\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tRambus Unveils Industry-First Complete Chipsets for Next-Generation DDR5 MRDIMMs and RDIMMs to Deliver Breakthrough Performance for Data Center and AI\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tRambus Expands Industry-Leading Memory Interface Chip Offering to High-Performance PCs with DDR5 Client Clock Driver\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t<\/div>\n\t\t\n\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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Papers<\/h4>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tExpanding Server Memory Capabilities with MRDIMM Technology\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tCXL emerges as memory coherent fabric leader as GenZ Consortium transfers assets\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tCXL Memory Interconnect Initiative: Enabling a New Era of Data Center Architecture\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t<\/div>\n\t\t\n\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tHow AI is Shaping the Memory Market\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tMemory Interface Chip Solutions for PC Clients and AI\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t
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\n\t\t\t\n\t\t\t\tMemory Interface Chip Solutions for Servers and AI in the Data Center\t\t\t<\/a>\n\t\t<\/h4>\n\t\t\t\t<\/div>\n\t\t\t\t<\/article>\n\t\t\t\t<\/div>\n\t\t\n\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t
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\n\t\t\t\t\t\n\t\t\t\t\t\t\n\t\t\t\t\t\t\t\t\tContact Us<\/span>\n\t\t\t\t\t<\/span>\n\t\t\t\t\t<\/a>\n\t\t\t\t<\/div>\n\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t
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\n\t\t\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t<\/div>\n\t\t","protected":false},"excerpt":{"rendered":"

The Rambus DDR5 Server DIMM buffer chipset is the industry\u2019s first functional silicon targeted for next-generation DDR5. Our chips are designed to enable high-capacity, high-speed and robust memory solutions for tomorrow\u2019s most demanding enterprise and data center applications.<\/p>\n","protected":false},"author":6,"featured_media":64419,"parent":12928,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"template-full.php","meta":{"_genesis_hide_title":false,"_genesis_hide_breadcrumbs":false,"_genesis_hide_singular_image":false,"_genesis_hide_footer_widgets":false,"_genesis_custom_body_class":"","_genesis_custom_post_class":"","_genesis_layout":"","footnotes":"","_links_to":"","_links_to_target":""},"tags":[],"class_list":{"0":"post-20276","1":"page","2":"type-page","3":"status-publish","4":"has-post-thumbnail","6":"entry"},"yoast_head":"\nDDR5 Server DIMM Chipset - Memory Interface Chips | Rambus<\/title>\n<meta name=\"description\" content=\"The Rambus DDR5 Memory Interface Chipset enables increased memory capacity, while maintaining peak performance on DIMMs, handling the most data-intensive workloads.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.rambus.com\/memory-interface-chips\/ddr5-dimm-chipset\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"DDR5 DIMM Chipset\" \/>\n<meta property=\"og:description\" content=\"The Rambus DDR5 Server DIMM buffer chipset is the industry\u2019s first functional silicon targeted for next-generation DDR5. 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