Cryptography Research division Archives - Rambus At Rambus, we create cutting-edge semiconductor and IP products, providing industry-leading chips and silicon IP to make data faster and safer. Fri, 08 Apr 2022 09:52:53 +0000 en-US hourly 1 https://wordpress.org/?v=6.8.3 Shifting gears for the IoT https://www.rambus.com/blogs/shifting-gears-iot/ https://www.rambus.com/blogs/shifting-gears-iot/#respond Wed, 20 Apr 2016 16:17:32 +0000 https://www.rambusblog.com/?p=1556 Writing for Semiconductor Engineering, Ann Steffora Mutschler observes that a shift is currently underway in the automotive industry as more connected vehicles hit the road each year.

“[Connectivity adds] many of the features that consumers now expect in mobile devices as well as some new ones that ultimately will lead to autonomous vehicles,” she explained.

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“But along with those changes are some nagging questions about just how safe [this] technology will be for consumers and others around them, and whether the whole system can be secured.”

As Mutschler acknowledges, such questions have been asked ever since the introduction of infotainment systems in cars.

“[However], the volume is increasing as more critical systems are connected to in-car networks and as more wireless features are added into vehicles,” she noted. “In effect, every new car is now an IoT device, and like every connected device, there are benefits and risks. But in the case of a two-ton object moving at high speed down a crowded highway, the risks are much more serious.”

According to Simon Blake-Wilson, VP of products and marketing for Rambus’ Cryptography Research Division, the industry is currently struggling with the concept of designing secure vehicles.

“We struggle in the sense that if you think about the security you apply to a mobile phone, it’s not like there is a magic bullet solution for mobile phone security. Similarly, everything about this from an [automotive] perspective must take into account many different security aspects,” Blake-Wilson told Semiconductor Engineering. “[Moreover], we struggle with the idea of whole-vehicle security just in the sense that people often come away expecting a magic bullet that’s going to solve the problem. We see cars being like other Internet connected objects, except much worse.”

As Mutschler points out, silicon foundries are now placing encryption algorithms into silicon with various technologies, including Rambus CryptoManager. Essentially, the CryptoManager platform acts as a foundational component capable of powering multiple security solutions. According to Blake-Wilson, a root of trust is the goal with any hardware-based security technology.

“For example, when you provision over-the-air updates, typically you sign those updates using a cryptographic mechanism called a digital signature scheme, with a private key and a public key. You sign the update with the private key, and the person that checks the signature has to have the right public key to verify it,” he continued. “A hardware root of trust manages the keys that you need to have, securing then in the right place to power the different security solutions. Once the key is in the right place, you go to the next step and use the key to check the signature. In the same way, you could use a hardware root of trust to provision keys and secure communications across the vehicle CAN [controller area network] bus as well.”

Including a root of trust in automotive semiconductors, says Blake-Wilson, will mark a critical security milestone for the industry.

“There will be a number of different applications or services that [require] security [measures]. Putting the right foundational capabilities into the chips that can be used by a variety of different applications will be key,” he concluded.

Interested in learning more about the Rambus CryptoManager platform? You can check out the CryptoManager product page here.

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There is no giant Faraday cage for the IoT https://www.rambus.com/blogs/there-is-no-giant-faraday-cage-for-the-iot-2/ https://www.rambus.com/blogs/there-is-no-giant-faraday-cage-for-the-iot-2/#respond Mon, 07 Mar 2016 15:58:37 +0000 https://www.rambusblog.com/?p=1462 A Faraday cage or Faraday shield can best be defined as an enclosure formed by conductive material that is used to block electric fields. As such, Faraday cages either heavily attenuate or block the reception and transmission of radio waves, which are a form of electromagnetic radiation.

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Image Credit: Frank Vincentz (Via Wikipedia)

Unfortunately, there is no Faraday cage large enough to shield the burgeoning Internet of Things and related infrastructure from certain hacks such as simple power analysis (SPA) and differential power analysis (DPA). To be sure, all physical electronic systems routinely leak information about their internal process of computing. In practical terms, this means attackers can exploit various side-channel techniques to gather data and extract secret cryptographic keys from IoT endpoints.

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“Regardless of specific instruction set architecture (ISA), most industry security solutions on the market today can be soundly defeated by side-channel attacks,” said Simon Blake-Wilson, a VP at Rambus’ Cryptography Research Division. “In fact, even a simple radio is capable of gathering side-channel information by eavesdropping on frequencies emitted by electronic devices. In some cases, secret keys can be recovered from a single transaction clandestinely performed by a device several feet away.”

The burgeoning IoT already comprises millions, if not billions, of connected endpoints powered by chips that are vulnerable to side-channel attacks. Such unprotected silicon (e.g., CPUs, MCUs, MPUs) can be found in a wide range of electronic devices including wearables, medical equipment, vehicles, smart appliances and rapidly evolving smart city infrastructure.

Perhaps not surprisingly, vulnerable Field Programmable Gate Arrays (FPGAs) are also gaining traction among IoT device manufacturers. Pankaj Rohatgi, a Security Technology Fellow at Rambus’ Cryptography Research Division, says the advantages of FPGAs include reduced time-to-market, field-configurability and lower up-front costs.

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“FPGAs are increasingly being relied upon to protect highly-sensitive intellectual property, trade-secrets, algorithms and cryptographic keys. They are also a natural fit for certain elements of the IoT,” he explained. “Sensitive FPGA applications – such as power grids, medical devices and semi-autonomous vehicle infrastructure – all require strong tamper resistance to protect both the secrets contained within these devices as well as the data they process.”

As Rohatgi confirms, power analysis attacks are among the most important to protect against, since they are non-invasive, widely understood by adversaries and easy to execute via inexpensive off-the-shelf equipment.

“Fortunately, specific DPA countermeasure strategies can be employed to protect FPGA-based IoT devices and related infrastructure,” he said. “These include techniques to minimize information leakage, generating noise to drown out leakage signals, the use of randomness to mask computational intermediates, algorithm and implementation obfuscation as well as the use of protocols designed to preserve secrecy even in the presence of (some) leakage.”

However, as Blake-Wilson emphasizes, side-channel attacks are only one specific attack vector threatening the IoT.

Hardware-based encryption market revenue to hit $36.4 billion

“The current security paradigm associated with the mobile and PC world is undeniably flawed. I find it difficult to believe that any serious industry player is honestly satisfied with the status quo, in which serious or even critical vulnerabilities disclosed on an almost daily basis are patched with hurriedly coded software and firmware updates,” he concluded. “A ‘good enough’ approach may have been tolerated for smartphones and tablets, but the industry cannot afford to relegate security to a tertiary concern for an IoT that may very well ultimately affect every aspect of our daily lives. A new paradigm, designed from the ground up to provide secure foundations for connected devices, is clearly long overdue. Devices need to be secured throughout their lifecycle from chip manufacture, to day-to-day deployment, to decommissioning. Alongside side channel attacks, secure provisioning and configuration are crucial issues that we are addressing with CryptoManager.”

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Rambus and Athena accelerate adoption of DPA countermeasures https://www.rambus.com/blogs/rambus-and-athena-accelerate-adoption-of-dpa-countermeasures-2/ https://www.rambus.com/blogs/rambus-and-athena-accelerate-adoption-of-dpa-countermeasures-2/#respond Tue, 01 Mar 2016 16:27:26 +0000 https://www.rambusblog.com/?p=1454 Rambus’ Cryptography Research division has signed an agreement with The Athena Group for the use of DPA countermeasure patents in the latter company’s cryptographic security IP cores. These include field-programmable gate arrays (FPGAs) and defense application specific integrated circuits (ASICs).

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The agreement allows Athena customers to obtain, directly from Athena, advanced countermeasure solutions that rely on Rambus Cryptography Research patents to protect against side-channel attacks. By utilizing advanced countermeasures implementations, Athena customers can ensure the data integrity of products that run applications requiring a high level of security, particularly those serving the aerospace and defense sectors.

“Securing cores against DPA attacks is a top priority for us and for our customers,” said Monica Murphy, president and CEO of Athena. “This expanded agreement with Rambus enables us to accelerate the adoption of advanced countermeasure solutions designed to counteract that risk. By providing our customers with a license to use Rambus Cryptography Research inventions in connection with our extensive portfolio of cryptographic cores, we can streamline the use model and make it significantly easier for customers to adopt this critical technology.”

According to Paul Kocher, chief scientist of the Rambus Cryptography Research division, today’s leading manufacturers are looking for solutions to counter the increasing threat of side-channel attacks.

“Broader and faster adoption of DPA Countermeasures in the FPGA ecosystem will ensure that components are insulated from these types of vulnerabilities,” he added. “Athena’s increased ability to rapidly engage and deliver solutions based on our portfolio of DPA countermeasures patents will bring significant benefits to the industries they serve, where safety and security are paramount.”

As we’ve previously discussed on Rambus Press, DPA, or differential power analysis, is a type of side-channel attack that monitors variations in the electrical power consumption or EM emissions from a target device. These measurements can be used to obtain cryptographic keys and other sensitive information from semiconductors.

As such, the Rambus Cryptography Research division has designed a range of DPA countermeasures that offer a combination of software, hardware and protocol techniques specifically designed to protect tamper-resistant devices from side-channel attacks. These include leak reduction, incorporating randomness, generating amplitude and temporal noise, as well as executing protocol-level countermeasures.

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Paul Kocher to moderate RSA Cryptographers’ panel https://www.rambus.com/blogs/paul-kocher-to-moderate-rsa-cryptographers-panel-3/ https://www.rambus.com/blogs/paul-kocher-to-moderate-rsa-cryptographers-panel-3/#respond Thu, 04 Feb 2016 18:24:55 +0000 https://www.rambusblog.com/?p=1375 Paul Kocher, the President and Chief Scientist of Rambus’ Cryptography Research division, will be moderating the RSA 2016 Cryptographers’ Panel on March 1st at 9:50AM.

Participants, including Adi Shamir, Moxie Marlinspike, Ronald Rivest and Whitfield Diffie, are slated to discuss the latest advances and revelations in cryptography, as well as the top security trends of 2016. Kocher is also scheduled to participate as a judge in the RSAC Innovation Sandbox Contest on February 29, from 1:00PM to 4:30PM.

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As we’ve previously discussed on Rambus Press, Paul Kocher has designed numerous cryptographic applications and protocols that are successfully deployed in real world systems. His work includes co-authoring the widely used SSL 3.0 standard and discovering Differential Power Analysis. A major focus of his current work is to improve the security foundations provided by complex semiconductor chips, with the aim of harnessing the advances fueled by Moore’s law to improve security.

In addition to the above-mentioned panels, the Rambus Cryptography Division will be showcasing its DPA Countermeasure Solutions at booth N4611 (North Expo).

“All forms of electronic devices with secret keys are susceptible to side channel attacks. These low-cost, non-invasive methods can be exploited to extract the secret key of a cryptosystem,” Kendra De Berti, Director of Solutions Marketing at Rambus, explained.

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“That is why the Rambus Cryptography Research division offers a comprehensive suite of DPA countermeasures, resistant cores and software libraries. Our portfolio of security cores and solutions allows manufacturers to design a wide range of tamper-resistant devices.”

For customers interested in gauging the level of side-channel vulnerability and resistance of a specific device, the Rambus Cryptography Research division will be showcasing its DPA Workstation (DPAWS), which features a highly intuitive UI paired with enhanced data visualization.

“Essentially, DPAWS provides an integrated, project-centric analytic environment specifically designed to optimize the efficiency of side-channel analysis,” De Berti added. “Both flexible and scalable, DPAWS easily integrates with a plethora of industry tools such as Matlab, as well as Python and other scripting languages.”

Interested in learning more? You can check out our DPA countermeasures here and our RSA 2016 page here.

 

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NIST bolsters random number generators https://www.rambus.com/blogs/nist-bolsters-random-number-generators-2/ https://www.rambus.com/blogs/nist-bolsters-random-number-generators-2/#respond Tue, 02 Feb 2016 16:27:23 +0000 https://www.rambusblog.com/?p=1368 The National Institute of Standards and Technology (NIST) has published the second draft of a publication that details design principles for entropy sources, which measure the randomness of generated numbers.

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As FCW’s Sean Lyngaas recently noted, cyber criminals can slice through a user’s communications without reliable random bit generators (RBGs).

“Security flaws in random number generators have been a significant source of vulnerabilities in cryptographic systems over many years,” Paul Kocher, chief scientist at the Cryptography Research Division of Rambus told the publication. “So it is crucially important to have random number generators that work well.”

According to Lyngass, the NIST draft specifies data that cryptographers can submit for entropy testing. The draft also describes the process of calculating initial entropy estimates, detailing how multiple noise sources of entropy can be factored into the calculation.

“The validation of an entropy source presents many challenges,” the NIST document reads. “No other part of an RBG is so dependent on the technological and environmental details of an implementation.”

Elaine Barker, one of the publication’s authors, told FCW that NIST was closely coordinating with those in charge of validating entropy sources.

“We don’t want to require anything that they can’t validate,” she explained. “As we deal with the various vendors, we get an idea of what they can and cannot do.”

The NIST is fielding feedback on its document via email through May 9th and will also offer a public workshop.

“NIST knows it needs to rebuild credibility after the Dual EC DRBG controversy, and seems to be doing the right things,” Kocher added. “These drafts from NIST are uncontroversial, and don’t have controversial constructions of the sort found in Dual EC DRBG that can harbor backdoors.”

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Rambus Chief Scientist Paul Kocher to deliver keynote @ DesignCon 2016 https://www.rambus.com/blogs/rambus-chief-scientist-paul-kocher-to-deliver-keynote-designcon-2016-2/ https://www.rambus.com/blogs/rambus-chief-scientist-paul-kocher-to-deliver-keynote-designcon-2016-2/#respond Tue, 24 Nov 2015 16:50:09 +0000 https://www.rambusblog.com/?p=1225 Paul Kocher, the Chief Scientist of Rambus’ Cryptography Research Division, will deliver a keynote presentation at DesignCon 2016 on Thursday, January 21 in Santa Clara, California. Additional keynote speakers include Al Eisaian, CEO, IntelinAir, Inc., and Pat Byrne, President, Tektronix.

“With an emphasis on education and peer-to-peer sharing among practicing engineers, DesignCon creates an atmosphere for learning about state-of-the-art design methodologies and technologies unlike anywhere else in the U.S,” conference organizers stated in a recent press release. “The keynote lineup for 2016 aims to cover the full engineering lifecycle, from concept and creativity to testing, securing and tips for entrepreneurial success.”

An acclaimed data security researcher and entrepreneur, Kocher is credited with co-authoring the widely-used SSL 3.0 standard, discovering side channel cryptanalysis, and leading the development of differential power analysis security countermeasures built into nearly 9 billion chips made annually. In 2014, Paul was inducted into the National Cyber Security Hall of Fame.

At DesignCon 2016, Kocher will explore the intersections of cryptography and data security with chip architectures in a special session titled “Silicon Foundations For Security.” More specifically, the chief scientist will highlight power analysis attacks as an example of how layers of abstraction can conceal security challenges, as well as discuss architectures aimed at scaling more securely.

Indeed, although the security capabilities and limitations of chips play a critical role in security, these foundations typically assume complex software will be bug-free. Thus, thus security failures are increasingly common in today’s complex and inter-connected products.

Interested in learning more about Paul Kocher’s security-related work at Rambus? You can check out our article archive about the chief scientist here.

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Securing the silicon of the IoT https://www.rambus.com/blogs/security-securing-the-silicon-of-the-iot/ https://www.rambus.com/blogs/security-securing-the-silicon-of-the-iot/#respond Mon, 16 Nov 2015 16:05:58 +0000 https://www.rambusblog.com/?p=1198 Paul Kocher, the Chief Scientist of Rambus’ Cryptography Research Division, recently participated in an ARM TechCon panel about securing the Internet of Things (IoT). As Kocher told conference attendees, strong hardware-based crypto
needs to be accompanied by an equally robust software security layer.

Checking boxes is not a panacea for IoT security

“8-10 years ago the industry was more focused on single-use platforms such as pay TV chips and smartcards. These single-use scenarios were simpler to design for and offered a high assurance of success,” he explained.

“However, today we have a plethora of devices with multiple functions and features. This complexity means bugs are being created far faster than they are being fixed. In addition, more devices means an increased number of targets, while more information [stored or collected on IoT devices or endpoints] offers greater rewards to hackers.”

According to Kocher, security is not always something people are willing to pay for. Nevertheless, the progression of Moore’s Law is helping to reduce costs from dollars to pennies. In addition, says the chief scientist, the Federal Trade Commission (FTC) has increased its scrutiny of consumer-related hacks, while a more stringent level of security is required for certain government applications and equipment.

“Ultimately, IoT security will enter a stage of maturity and responsibility,” Kocher opined. “In the meantime, we are experiencing growing pains, much like the aviation and pharmaceutical industries did before an increase in both collaboration and regulation. This approach has to change at some point, but the question is how bad does it have to get before people really care.”

What is needed now, says the chief scientist, is to avoid situations where vulnerable products are deployed in the field for 10-15 years or more – at which point they may no longer be supported by belated software security patches. Indeed, as Kocher noted earlier this year, numerous companies are still routinely “checking the security box” to expedite the process of launching a new product.

“They want the least intrusive, least comprehensive evaluation possible. And then there are companies that have been hacked that want to understand their risk and mitigate it,” he added.

“If you get check boxes without teeth behind the consequences, it doesn’t help. If you can get liability and skin in the game for companies that control the risk, it would be transformative.”

Interested in learning more about how Rambus is helping to secure the rapidly evolving Internet of Things (IoT)? You can check out our article archive on the subject here.

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Rambus is @ ARMTechCon 2015 https://www.rambus.com/blogs/rambus-is-armtechcon-2015-2/ https://www.rambus.com/blogs/rambus-is-armtechcon-2015-2/#respond Wed, 11 Nov 2015 16:06:51 +0000 https://www.rambusblog.com/?p=1180 Rambus – a silver sponsor of ARM TechCon 2015 – is kicking off the show this morning with a series of live demos centered on the burgeoning Internet of Things (IoT).

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“The vision of the IoT depends upon data – data that constantly surrounds us – not just to measure and track, but to analyze, predict and act upon,” said Kendra De Berti, a director at Rambus.

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“Visit us at booth #606 to see how Rambus products and solutions capture, secure and move the massive amounts of data that will fuel the future of the IoT.”

Live demos include:

In addition to the above-mentioned demos, Paul Kocher, Chief Scientist of the Rambus Cryptography Research Division, will be participating in Wednesday’s “IoT Security Therapy” panel (Ballroom F, 4:30pm – 5:20pm). Additional panel participants include Kevin Krewell of Tirias Research, Eduardo Montanez of Freescale and Zach Shelby of ARM.

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“The electronics industry is rapidly moving to connect people and machines to each other and the Cloud,” De Berti told Rambus Press. “This is unleashing an unprecedented amount of data and opening up new opportunities using data analytics to deep learning. As such, Paul Kocher will be discussing the threats and challenges of securing data from the sensor to the cloud.”

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Rambus and Riverside Research to co-host security workshop https://www.rambus.com/blogs/security-rambus-and-riverside-research-to-co-host-security-workshop/ https://www.rambus.com/blogs/security-rambus-and-riverside-research-to-co-host-security-workshop/#respond Wed, 21 Oct 2015 16:13:44 +0000 https://www.rambusblog.com/?p=1136 Rambus’ Cryptography Research division and Riverside Research will be co-hosting a two-day workshop on identifying and preventing advanced security threats. The workshop – scheduled for November 18-19, 2015 – is targeted at hardware and software security developers with a focus on defense and government industries.

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More specifically, technologists designing and testing tamper resistant systems for government and defense applications, mobile devices, financial systems, pay television, mass transit, secure ID and secure storage media are encouraged to attend the workshop.

Topics covered in the workshop are slated to include various types of side-channel analysis, such Simple Power Analysis (SPA) and Differential Power Analysis (DPA), as well as their electromagnetic analysis counterparts, SEMA and DEMA.

Participants will be given the opportunity to perform hands-on exercises to recover AES and RSA private keys. Live demos of side-channel attacks and analysis will also be performed on a mobile phone, ECC device and FPGA platform with Rambus’ DPA Workstation™. Additional lecture topics will include DPA countermeasures and testing for side-channel analysis vulnerabilities.

“Our security experts routinely provide technical tutorials, hands-on workshops and training seminars with facilitated discussion,” Kendra De Berti, a director at Rambus, told us. “Clients use our training to understand security-critical challenges and help project teams transition to new security problems. These sessions are typically 1-4 working days and can be conducted at a client’s location or at our San Francisco office.”

Interested in learning more? You can check out our security, education and training page here.

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Evolving differential power analysis targets SIM cards https://www.rambus.com/blogs/security-evolving-differential-power-analysis-targets-sim-cards/ https://www.rambus.com/blogs/security-evolving-differential-power-analysis-targets-sim-cards/#respond Wed, 23 Sep 2015 16:22:14 +0000 https://www.rambusblog.com/?p=1073 Ernest Worthman of Semiconductor Engineering recently noted that differential power analysis (DPA) has been a threat vector on the chip landscape for a number of years.

“[DPA] was discovered around the mid 1990s by the teams at Rambus’ Cryptography Research Division,” he explained. “It turned out to be a very effective tool for compromising the ubiquitous SIM card environment.”

According to Simon Blake-Wilson, VP of products and marketing at Rambus, DPA has historically targeted smart cards due to their widespread deployment and security limitations.

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“The most traditional market for DPA has been with smart cards because of their limitations – consumer goods type of devices, low cost, limited power,” he told the publication. “That makes them a fertile landscape for DPA. Of course, DPA is capable of side channel attacks on just about any chip, but the relative lack of control over, and ease with which one could obtain SIM cards made them easy pickings for such power analysis techniques.”

Perhaps not surprisingly, evolving DPA techniques have reached sophisticated levels, while DPA kits are now available for sale on the Internet.

“Edge-of-the-envelope hardware and software [offer] tremendous analysis capabilities [for] side channel attacks,” Pankaj Rohatgi, director of engineering at Cryptography Research told Semiconductor Engineering. “Therefore, the data collected is of much better quality, from better equipment, which in turn, allows for more sophisticated attacks.”

Although progress has been made in protecting SIM cards, the attack platform is never more than a step behind, says Worthman.

“DPA continues to be thorn in the side of the semiconductor industry,” he confirmed. “Unless the ‘non-security-centric manufacturers’ suddenly become concerned, it’s likely that DPA will become more prevalent as more and more low/no-security chips are embedded or install in lower-end Internet of Everything (IoE) devices.”

As Worthman notes, it is somewhat difficult to predict the future of DPA relative to the IoE.

“[Nevertheless], there are a couple of things that are a given. One, the IoE will be flush with SIM-type chips. They are cheap, easy to produce and offer plenty of resources for low-end devices,” he added. “They also tend to have weak or no security. Programmable SIMs have yet to develop a clear track so it is difficult to see exactly where, or even if, they will find wide-scale adoption. And the resources for DPA attacks are now easily acquired and relatively cheap.”

Indeed, a Jiao Tong University researcher recently exploited side-channel attack techniques to crack the AES-128 encryption codes protecting 3G and 4G cards. According to Iain Thomson of The Register, Yu Yu and his university team tracked power levels using an oscilloscope, monitored data traffic with an MP300-SC2 protocol analyzer and correlated the results with a SIM card reader and standard PC.

“With this simple setup they cracked eight commercial SIM cards in between 10 and 80 minutes,” Thomson reported. “Yu [also] demonstrated how the cloned SIM card can successfully impersonate the owner in class [and] showed how a cloned card could change the password on an Alipay and potentially drain the account.”

As Yu confirmed, the above-mentioned hack is based on known differential power analysis attacks.

“The move to AES-based encryption algorithms in 3G/4G USIM cards did not systematically take advantage of state-of-the-art countermeasures against side-channel attacks,” he added. “The USIM cards we analyzed essentially relied on plain (unprotected) software implementations of the AES.”

Helena Handschuh, a Director at Rambus’ Cryptography Research division, co-designed the MILENAGE standard discussed in Yu’s Black Hat paper. According to Handschuh, AES-128/Rijndael was chosen for MILENAGE in 2001 so that side-channel countermeasures could be easily incorporated in a SIM-class platform.

“Yu Yu’s paper demonstrates once again that, even though these algorithms are mathematically strong and unbroken, all implementers of crypto need to be aware of side-channel attacks and take appropriate steps to mitigate them,” Handschuh concluded.

As we’ve previously discussed on Rambus Press, physical electronic systems routinely leak information about the internal process of computing. In practical terms, this means attackers can exploit various side-channel techniques to gather data and extract secret cryptographic keys.

As such, the Rambus Cryptography Research division has designed a range of DPA countermeasures that offer a combination of software, hardware and protocol techniques specifically designed to protect tamper-resistant devices from side-channel attacks. These include leak reduction, incorporating randomness, generating amplitude and temporal noise, as well as executing protocol-level countermeasures.

Interested in learning more about how Rambus is helping to secure SoCs, devices and content? You can read more about our DPA countermeasures here, CryptoFireWall Cores here and CryptoManager platform here.

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