DPA Countermeasures Archives - Rambus

Revolution in Embedded Security

fongj@rambus.com — Tue, 08 Feb 2022 22:39:58 +0000

The growth of computing, graphics, neural processing power, communication bandwidth, and storage capacities have enabled amazing solutions. These innovations have created great value for society, and that value must be protected from exploitation by adversaries. This whitepaper explores many of these major technology changes and how Rambus’ security offerings help in tackling the new embedded security challenges of device and silicon manufacturers.

Protecting Electronic Systems from Side-Channel Attacks

fongj@rambus.com — Thu, 21 Dec 2017 18:11:13 +0000

Side-channel attacks conducted against electronic systems are relatively simple and inexpensive to execute. An attacker does not need to know specific implementation details of the cryptographic device to perform these attacks and extract keys. As all physical electronic systems routinely leak information, effective side-channel countermeasures such as Rambus’ DPA Resistant Hardware Cores (DPARC) or DPA Software Library (DPASL) should be implemented at the design stage to ensure protection of sensitive keys and data. After the implementation of hardware or software countermeasures, systems should be carefully evaluated with a Test Vector Leakage Assessment (TVLA) platform such as the Rambus DPA Workstation (DPAWS) to confirm the cessation of sensitive side-channel leakage.

Introduction to Side-Channel Attacks

fongj@rambus.com — Thu, 18 May 2017 19:57:08 +0000

Side-channel attacks conducted against electronic gear are relatively simple and inexpensive to execute. Such attacks include simple power analysis (SPA) and Differential Power Analysis (DPA). An attacker does not need to know specific implementation details of the cryptographic device to perform these attacks and extract keys. As all physical electronic systems routinely leak information, effective side-channel countermeasures should be implemented at the design stage to ensure protection of sensitive keys and data.

Test Vector Leakage Assessment (TVLA) Derived Test Requirements (DTR) with AES

fongj@rambus.com — Fri, 14 Aug 2015 00:30:43 +0000

This document describes requirements and test procedures for qualifying DPA-resistant implementations of cryptographic algorithms with specific instructions and test vectors for AES. Expected lab and analyst proficiency, device setup, data acquisition, signal processing, analysis and evaluation procedures are described herein.

Download “Test Vector Leakage Assessment (TVLA) Derived Test Requirements (DTR) with AES”

Is Your Mobile Device Radiating Keys?

fongj@rambus.com — Fri, 24 Aug 2012 13:45:20 +0000

Is your mobile device’s EM emissions leaking your keys? A mobile app can inadvertently radiate secret data as cryptographic processing is done by the CPU. We’ll use a simple antenna and radio to perform live key extraction from several modern handheld devices. Developers can use several techniques to mitigate risk whenever applications use high-valued cryptographic keys.

Download “Is Your Mobile Device Radiating Keys?”

Mobile Device Security: The case for side channel resistance

fongj@rambus.com — Fri, 13 Jan 2012 22:57:40 +0000

As the functionality of mobile devices has increased, so have the threats. These devices make attractive targets, given the sensitivity of user and corporate data they process and store, their emerging use for viewing protected content and conducting sensitive banking and payment transactions. Until recently, hardware and software based defenses for mobile platforms lagged behind those found in more mature systems.

Download “Mobile Device Security: The case for side channel resistance”

A testing methodology for side-channel resistance validation

fongj@rambus.com — Wed, 24 Aug 2011 13:55:13 +0000

The goal of a side‐channel resistance validation program is to assess whether a cryptographic module utilizing side‐channel analysis countermeasures can provide resistance to these attacks commensurate with the desired security level. While, no standardized testing program can guarantee resistance against all attacks, an effective program should be able to validate that sufficient care was taken in the design and implementation of countermeasures.

Download “A testing methodology for side-channel resistance validation”

Leakage resistant encryption and decryption

fongj@rambus.com — Sat, 13 Aug 2011 23:54:52 +0000

Data encryption and decryption operations are basic building blocks for most security applications. For this purpose, most systems use block ciphers, such as the public AES standard. It is well known, however, that implementations of block ciphers such as AES, as well as other cryptographic algorithms, are subject to side-channel attacks [1]. These attacks allow adversaries to extract secret keys from devices by passively monitoring power consumption, EM emissions, or other “side channels”. Differential power analysis (DPA) is a common side channel attack that leverages power measurements.

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Introduction to differential power analysis

fongj@rambus.com — Sat, 14 Aug 2010 00:03:30 +0000

The power consumed by a circuit varies according to the activity of its individual transistors and other components. As a result, measurements of the power used by actual computers or microchips contain information about the operations being performed and the data being processed. Cryptographic designs have traditionally assumed that secrets are manipulated in environments that expose no information beyond the specified inputs and outputs.

Download “Introduction to differential power analysis”

Protecting FPGAs from Power Analysis

fongj@rambus.com — Tue, 20 Apr 2010 13:58:18 +0000

Recent advances in the size and performance of FPGAs, coupled with advantages in time-to-market, field-reconfigurability and lower up-front costs, make FPGAs ideally suited to a wide range of commercial and defense applications [6]. In addition, FPGAs’ generality and reconfigurability provide important protections against the introduction of Trojan horses during semiconductor manufacturing process[8]. As a result, FPGA applications increasingly involve highly-sensitive intellectual property and trade-secrets, as well as cryptographic keys and algorithms.

Download “Protecting FPGAs from Power Analysis”